iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	vhdl: minimal support of interface package in entities. For #1262	Tristan Gingold	2020-04-27	1	-13/+25
*	vhdl: fix crash on vhdl08 sub-sub index constraint. For #1191	Tristan Gingold	2020-04-07	1	-3/+2
*	vhdl: improve support of AMS-vhdl (array and record natures, source quantities)	Tristan Gingold	2019-12-28	1	-3/+3
*	vhdl: handle P32 in connect_scalar. Fix #918	Tristan Gingold	2019-09-05	1	-1/+2
*	vhdl: translate anonymous_signal_declaration.	Tristan Gingold	2019-07-03	1	-8/+2
*	vhdl: add anonymous_signal_declaration.	Tristan Gingold	2019-07-03	1	-1/+7
*	vhdl: extract vhdl.errors from errorout.	Tristan Gingold	2019-05-08	1	-1/+1
*	vhdl: move iirs_utils to vhdl.utils	Tristan Gingold	2019-05-06	1	-1/+1
*	vhdl/translate: check_composite_match: rename and handle records.	Tristan Gingold	2019-05-03	1	-3/+4
*	translate: renaming, support constrained unbounded record aggregates.	Tristan Gingold	2018-12-07	1	-4/+4
*	trans-chap5: do subtype conversion in signal association.	Tristan Gingold	2018-11-10	1	-2/+10
*	Rework translation of unbounded and complex types.	Tristan Gingold	2018-10-21	1	-18/+16
*	translation: for port assiation by expression: handle formal before actual.	Tristan Gingold	2018-02-20	1	-2/+2
*	Translate; properly separates translation of types from translation of subtypes.	Tristan Gingold	2018-01-17	1	-1/+2
*	trans-chap3: unbox recod in Get_Composite_Base.	Tristan Gingold	2017-11-27	1	-1/+1
*	Use flist for disconnection specification and component specification.	Tristan Gingold	2017-11-08	1	-3/+2
*	Rename In_Conversion/Out_Conversion to Actual_Conversion/Formal_Conversion.	Tristan Gingold	2017-09-13	1	-6/+6
*	translate: renaming.	Tristan Gingold	2017-06-21	1	-3/+4
*	Fix crash of implicit conversion in instantiation.	Tristan Gingold	2017-06-12	1	-2/+14
*	Create default value for ports.	Tristan Gingold	2017-05-09	1	-35/+49
*	Minor optimization: avoid calls to Get_Association_Formal.	Tristan Gingold	2017-05-08	1	-7/+6
*	vhdl08: unbounded records (WIP - individual association)	Tristan Gingold	2017-03-09	1	-1/+1
*	translate: WIP - refactoring for unbounded records.	Tristan Gingold	2017-01-02	1	-1/+1
*	translate: rename get_array_base to get_composite_base	Tristan Gingold	2017-01-02	1	-3/+3
*	translate: refactoring for ortho_info_type.	Tristan Gingold	2016-12-30	1	-6/+6
*	canon: do not set formal of association by position.	Tristan Gingold	2016-10-19	1	-23/+30
*	Rework AST to setup ownership and reference policy.	Tristan Gingold	2016-10-11	1	-2/+2
*	Fix attribute specification with non-static expression	Tristan Gingold	2016-10-04	1	-9/+32
*	Emit error message during analysis for missing generic association.	Tristan Gingold	2016-10-01	1	-0/+1
*	vhdl08: more support for interface subprograms.	Tristan Gingold	2016-09-27	1	-1/+2
*	vhdl08: handle interface type in generic-mapped package	Tristan Gingold	2016-09-15	1	-0/+2
*	Enable vest recursive instantiation test.	Tristan Gingold	2016-07-03	1	-5/+11
*	Initial support of direct recursive instantiation.	Tristan Gingold	2016-07-03	1	-116/+160
*	translation: avoid memory leak while allocating ports.	Tristan Gingold	2016-03-16	1	-2/+3
*	Set type staticness for a constant declaration and attribute specification.	Tristan Gingold	2016-01-11	1	-10/+11
*	Pass signal values to interfaces. 'sigptr' optimization.	Tristan Gingold	2015-12-18	1	-245/+271
*	Adjust previous patch (destroy types for default port values).	Tristan Gingold	2015-09-03	1	-3/+3
*	Translate: explicitly clean transient types.	Tristan Gingold	2015-09-02	1	-4/+4
*	Destroy types of default generic values.	Tristan Gingold	2015-09-01	1	-8/+10
*	Replace fat accesses by bounds accesses	Tristan Gingold	2015-08-29	1	-24/+7
*	Split translation into child packages.	Tristan Gingold	2014-11-09	1	-0/+765