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synth
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Author
Age
Files
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*
synth-vhdl_eval: complete vector reduce operations
Tristan Gingold
2022-05-31
1
-7
/
+21
*
synth-vhdl_eval: handle shift and rotations
Tristan Gingold
2022-05-31
1
-6
/
+29
*
synth-vhdl_eval: handle vector match, numeric_bit.to_unsigned
Tristan Gingold
2022-05-31
2
-7
/
+73
*
synth-vhdl_stmts: do not convert out variable on call
Tristan Gingold
2022-05-31
1
-3
/
+8
*
synth-vhdl_stmts: export Synth_Subprogram_Back_Association
Tristan Gingold
2022-05-31
2
-7
/
+15
*
synth-vhdl_static_proc: handle write_real
Tristan Gingold
2022-05-31
1
-0
/
+32
*
synth-vhdl_eval: handle more operations (to_string, match)
Tristan Gingold
2022-05-31
2
-23
/
+229
*
synth-vhdl_eval: handle more operators
Tristan Gingold
2022-05-30
3
-26
/
+402
*
synth-vhdl_static_proc: add hook for std.env.finish
Tristan Gingold
2022-05-30
2
-0
/
+12
*
synth-vhdl_oper: add hooks for bit edge
Tristan Gingold
2022-05-30
2
-0
/
+15
*
vhdl-nodes: move maximum/minimum out of predefined operator range
Tristan Gingold
2022-05-30
2
-37
/
+40
*
elab-vhdl_objtypes: bit and logic types also have a range
Tristan Gingold
2022-05-30
2
-6
/
+13
*
synth-vhdl_eval: handle more operations
Tristan Gingold
2022-05-29
3
-17
/
+210
*
synth-vhdl_eval: handle resolution_limit
Tristan Gingold
2022-05-29
1
-0
/
+3
*
elab-debugger: export more subprograms
Tristan Gingold
2022-05-29
1
-0
/
+6
*
synth-vhdl_stmts: export two procedures, adjust assertion message
Tristan Gingold
2022-05-29
2
-5
/
+10
*
synth-vhdl_oper: add hook for falling edge, handle aliases.
Tristan Gingold
2022-05-29
3
-3
/
+13
*
synth-vhdl_eval: handle more operations
Tristan Gingold
2022-05-29
1
-0
/
+30
*
elab-vhdl_objtypes: add unshare with areapool
Tristan Gingold
2022-05-29
2
-0
/
+13
*
synth: handle suspend state declaration and statement
Tristan Gingold
2022-05-27
2
-0
/
+16
*
elab-debugger: add Debug_Time
Tristan Gingold
2022-05-27
2
-1
/
+16
*
elab-vhdl_debug: handle records in disp_memtyp.
Tristan Gingold
2022-05-27
2
-4
/
+32
*
elab-vhdl_objtypes: add Create_Memory_U32 (for states)
Tristan Gingold
2022-05-27
2
-3
/
+19
*
vhdl-canon: add Canon_Add_Suspend_State
Tristan Gingold
2022-05-26
1
-0
/
+6
*
synth: move procedure call copyback values in context
Tristan Gingold
2022-05-25
3
-79
/
+82
*
vhdl: move Is_Copyback_Parameter to vhdl-utils
Tristan Gingold
2022-05-25
1
-12
/
+2
*
synth: add value_dyn_alias in elab-vhdl_values
Tristan Gingold
2022-05-25
8
-72
/
+203
*
elab-vhdl_objtypes: use value_offsets for record elements offset.
Tristan Gingold
2022-05-24
12
-56
/
+52
*
synth-vhdl_stmts: minor refactoring
Tristan Gingold
2022-05-24
1
-12
/
+23
*
synth-vhdl_eval: handle element-element concatenation
Tristan Gingold
2022-05-24
1
-0
/
+18
*
elab-vhdl_values-debug: slightly improve output
Tristan Gingold
2022-05-24
1
-2
/
+6
*
synth-vhdl_stmts: rework synth_subprogram_association
Tristan Gingold
2022-05-23
1
-35
/
+35
*
synth-vhdl_oper: add an hook for rising_edge
Tristan Gingold
2022-05-23
3
-4
/
+13
*
elab-vhdl_objtypes: replace Is_Synth by Wkind
Tristan Gingold
2022-05-22
3
-23
/
+40
*
synth: use same elements for unbounded arrays and vectors
Tristan Gingold
2022-05-22
9
-70
/
+36
*
synth: also use one-dimensional unbounded arrays for objtypes
Tristan Gingold
2022-05-22
6
-58
/
+66
*
synth: merge value for type_vector and type_array
Tristan Gingold
2022-05-22
14
-131
/
+107
*
elab-vhdl_values-debug: improve debug_typ output
Tristan Gingold
2022-05-22
1
-14
/
+37
*
synth: use unidimentional arrays in type_acc. Factorize code.
Tristan Gingold
2022-05-22
17
-552
/
+340
*
synth-vhdl_stmts: write generic procedure Assign_Aggregate.
Tristan Gingold
2022-05-21
2
-14
/
+29
*
synth-vhdl_expr: avoid a memocy copy
Tristan Gingold
2022-05-21
1
-3
/
+7
*
synth/elab-vhdl_values: use a proper type for signal_index
Tristan Gingold
2022-05-19
5
-7
/
+11
*
synth-vhdl_stmts: avoid a crash after an error. Fix #2063
Tristan Gingold
2022-05-18
1
-1
/
+4
*
synth-vhdl_stmts: add comments about report statements
Tristan Gingold
2022-05-18
1
-5
/
+51
*
elab-vhdl_context: remove cur_stmt from context
Tristan Gingold
2022-05-17
2
-21
/
+0
*
synth-vhdl_stmts: add a comment
Tristan Gingold
2022-05-17
1
-0
/
+2
*
synth-vhdl_oper: handle to_stdulogicvector for slv. Fix #2062
Tristan Gingold
2022-05-17
1
-0
/
+1
*
elab-vhdl_debug(disp_instance_path): can also display components
Tristan Gingold
2022-05-16
2
-7
/
+23
*
elab-vhdl_debug: factorize code, make Put_Dir public
Tristan Gingold
2022-05-16
2
-12
/
+6
*
elab-vhdl_values: rename signal_index to signal_index_type
Tristan Gingold
2022-05-15
3
-5
/
+5
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