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path: root/src/synth/synth-expr.adb
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* synth: emit an error for non-constant bounds.Tristan Gingold2019-07-041-0/+4
* synth-expr: remove useless code.Tristan Gingold2019-07-021-5/+1
* synth: destroy iterator after for-loop.Tristan Gingold2019-07-011-0/+2
* synth: improve handling of dynamic slices, add aTristan Gingold2019-07-011-3/+30
* synth: add dyn_insert module.Tristan Gingold2019-07-011-9/+9
* synth: add types_utils package.Tristan Gingold2019-07-011-3/+1
* synth: handle for-loop statements.Tristan Gingold2019-07-011-1/+2
* synth: handle more concat.Tristan Gingold2019-06-301-0/+19
* synth: handle more comparisons.Tristan Gingold2019-06-301-11/+29
* synth: handle std_logic_unsigned."+"Tristan Gingold2019-06-301-1/+2
* synth: handle "=" from std_logic_unsigned.Tristan Gingold2019-06-291-1/+2
* vhdl: move annotations from simul to vhdl.Tristan Gingold2019-06-291-1/+1
* synth: disp_vhdl: merge literals.Tristan Gingold2019-06-281-0/+7
* synth: Move get_input_net to netlists.utils.Tristan Gingold2019-06-281-0/+1
* synth: handle some functions from math_real.Tristan Gingold2019-06-281-1/+43
* synth: add get_input_net helper.Tristan Gingold2019-06-281-7/+7
* synth: add syn_extract for dynamic slices.Tristan Gingold2019-06-281-54/+205
* synth: handle slice assignment.Tristan Gingold2019-06-251-31/+32
* synth: add insert gate.Tristan Gingold2019-06-241-16/+23
* synth: handle more operators.Tristan Gingold2019-06-231-4/+15
* synth: remove unused Value_Logic.Tristan Gingold2019-06-231-13/+5
* synth: handle ult comparison.Tristan Gingold2019-06-231-28/+36
* synth: handle more predefined functions.Tristan Gingold2019-06-231-3/+74
* synth-expr: clarify error message.Tristan Gingold2019-06-201-2/+7
* synth: get rid of execution and elaboration.Tristan Gingold2019-06-191-254/+450
* synth-expr: use Node instead of Iir (renaming).Tristan Gingold2019-06-131-32/+32
* synth-expr: handle choice_by_expression in aggregates.Tristan Gingold2019-06-121-3/+30
* synth: handle enumerated types.Tristan Gingold2019-06-121-9/+12
* synth-expr: resize for uns-uns operations.Tristan Gingold2019-06-121-18/+28
* synth: support conditional signal assignments.Tristan Gingold2019-06-081-0/+6
* synth: handle integer +/- for constants.Tristan Gingold2019-06-081-21/+37
* synth: WIP for dependencies.Tristan Gingold2019-06-071-11/+10
* synth: add comments and refactoring.Tristan Gingold2019-06-071-1/+0
* synth: handle numeric_std unsigned - unsigned add and subChristos Gentsos2019-06-061-0/+22
* synth: handle array equality op (just for arrays of identical range)Christos Gentsos2019-06-061-0/+8
* synth: enabled vector AND, OR and XORChristos Gentsos2019-06-061-8/+14
* synth: added support for numeric_std unary negationChristos Gentsos2019-06-061-0/+3
* synth: handle numeric_std subtraction (addition was already there)Christos Gentsos2019-06-061-0/+11
* synth: added support for vector "not" operationChristos Gentsos2019-06-061-0/+9
* synth: added support for array-element and element-array concatsChristos Gentsos2019-06-061-2/+27
* synth-expr: fix a crash in vectorize_arrayTristan Gingold2019-06-061-1/+4
* synth: add support for constants.Pepijn de Vos2019-05-281-1/+7
* synth: use only one edge gate, make it fully abstract. Handle falling_edge.Tristan Gingold2019-05-221-6/+18
* vhdl: extract vhdl.errors from errorout.Tristan Gingold2019-05-081-1/+1
* vhdl: move ieee packages to vhdl children.Tristan Gingold2019-05-051-13/+13
* vhdl: move std_standard package to vhdl child.Tristan Gingold2019-05-051-3/+3
* synth: improve generation of aggregates.Tristan Gingold2019-04-161-13/+61
* synth: minimal support of slices.Tristan Gingold2019-04-161-0/+87
* synth-expr: handle others in aggregate.Tristan Gingold2019-04-161-0/+5
* Create the simul.ads package (for a namespace).Tristan Gingold2017-11-241-3/+3
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