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* synth: do not try to do inference on unused nets. Fix #1225Tristan Gingold2020-04-141-1/+5
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* synth: refactoring to store static values in wires.Tristan Gingold2020-04-091-111/+195
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* synth: preliminary support of multiport rams (using shared variable).Tristan Gingold2020-03-281-12/+75
| | | | For #1069
* synth-environment: fix incorrect memory access.Tristan Gingold2020-03-251-2/+6
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* synth-environment: simplify code.Tristan Gingold2020-03-251-9/+5
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* synth: handle reuse of inferred dff in the same process.Tristan Gingold2020-03-221-25/+60
| | | | Fix tgingold/ghdlsynth-beta#93
* synth-environment: keep order of seq_assign in phi nodes.Tristan Gingold2020-03-211-5/+11
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* synth: refactoring inference (WIP).Tristan Gingold2020-03-151-32/+69
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* synth-environment: handle unassigned outputs.Tristan Gingold2020-02-181-6/+8
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* synth: rework (again) memory inference.Tristan Gingold2020-02-101-7/+25
| | | | | | Preliminary work to support multi-clock memories. Strengthen and fix fallout of Check_Connected. Rename synth.inference to netlists.inference.
* synth: improve support of out/inout variable parameters.Tristan Gingold2020-01-081-0/+2
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* synth-environment: also optimize mux merge for sub-nets.Tristan Gingold2019-12-311-1/+1
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* synth-environment: fix links and counts inTristan Gingold2019-11-121-0/+3
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* synth: merge partial assignments before merging phis.Tristan Gingold2019-11-111-0/+56
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* synth-decls: handle unassigned signal/object. For issue 65Tristan Gingold2019-11-071-0/+1
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* synth: extract netlists-folds from netlists-builders.Tristan Gingold2019-11-051-0/+1
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* synth: create build2_concat from netlists-concat.Tristan Gingold2019-10-271-0/+1
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* synth-environment: fix a thinko.Tristan Gingold2019-10-091-1/+2
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* synth: propagate assignments out of subprograms. Fix #960Tristan Gingold2019-10-061-0/+27
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* netlists: remove renaming of Get_Parent for Net.Tristan Gingold2019-10-061-3/+3
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* synth: add error messages for latches.Tristan Gingold2019-10-061-1/+0
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* synth: fix extract_merge_partial_assigns.Tristan Gingold2019-10-021-5/+15
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* synth: fix in extract_merge_partial_assigns.Tristan Gingold2019-10-011-0/+5
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* synth-environment: optimize cascaded if.Tristan Gingold2019-09-281-1/+27
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* synth: finalize declarations and free wires.Tristan Gingold2019-09-271-14/+92
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* synth: improve locations tracking.Tristan Gingold2019-09-181-3/+9
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* synth: fix to get_current_assign_value.Tristan Gingold2019-09-171-7/+4
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* synth: fold addition on constant nets.Tristan Gingold2019-09-171-0/+45
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* synth: improve support of return statement.Tristan Gingold2019-09-111-0/+5
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* synth: handle partial assignments in case statements.Tristan Gingold2019-09-071-17/+0
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* synth: abstract of Merge_Assigns.Tristan Gingold2019-09-061-56/+111
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* synth: add netlists.concatsTristan Gingold2019-09-051-31/+7
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* [PATCH] synth-environment: fix thinkos.Tristan Gingold2019-08-311-14/+57
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* synth: add support for record types.Tristan Gingold2019-08-291-4/+0
| | | | (WIP: need to fix regression of stmt01).
* synth: rework partial assignmentsTristan Gingold2019-08-271-130/+488
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* synth: improve error message for multiple assignments.Tristan Gingold2019-08-021-4/+20
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* synth: handle partial assignments in a process (WIP).Tristan Gingold2019-08-011-18/+75
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* synth: refactoring in inference/environment.Tristan Gingold2019-08-011-1/+8
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* synth: refactor inference, add comment, strengthen check.Tristan Gingold2019-08-011-12/+18
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* synth: add concatn gateTristan Gingold2019-07-191-1/+10
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* synth: finalize concurrent assignments (WIP).Tristan Gingold2019-07-191-23/+274
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* synth: make type Wire_Id_Record private.Tristan Gingold2019-07-171-0/+29
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* synth: renaming of Assign to Seq_Assign.Tristan Gingold2019-07-171-50/+52
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* synth: add comments.Tristan Gingold2019-07-171-0/+1
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* synth: add comments.Tristan Gingold2019-07-151-6/+10
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* synth-environement: add comments.Tristan Gingold2019-07-081-0/+3
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* synth: support async reset in inference.Tristan Gingold2019-04-161-0/+3
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* Add netlist generation infrastructure.Tristan Gingold2017-01-311-0/+334
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