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| author | Tristan Gingold <tgingold@free.fr> | 2019-11-12 18:45:54 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-11-12 20:36:02 +0100 |
| commit | 6898560ebf83a9e736ce3b2eedc662eec852d342 (patch) | |
| tree | b1950a552aa426bcddc9cc5f7cce7d0e56618096 /src/synth/synth-environment.adb | |
| parent | a6732f023ae5eada414ce69e97d4d93a871431dd (diff) | |
| download | ghdl-6898560ebf83a9e736ce3b2eedc662eec852d342.tar.gz ghdl-6898560ebf83a9e736ce3b2eedc662eec852d342.tar.bz2 ghdl-6898560ebf83a9e736ce3b2eedc662eec852d342.zip | |
synth-environment: fix links and counts in
Diffstat (limited to 'src/synth/synth-environment.adb')
| -rw-r--r-- | src/synth/synth-environment.adb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/synth/synth-environment.adb b/src/synth/synth-environment.adb index 5b051d3d7..11c4b505d 100644 --- a/src/synth/synth-environment.adb +++ b/src/synth/synth-environment.adb @@ -262,9 +262,11 @@ package body Synth.Environment is First := No_Seq_Assign; Last := No_Seq_Assign; Asgn := Phi.First; + Phi.Nbr := 0; while Asgn /= No_Seq_Assign loop pragma Assert (Assign_Table.Table (Asgn).Phi = Current_Phi); Next_Asgn := Get_Assign_Chain (Asgn); + Set_Assign_Chain (Asgn, No_Seq_Assign); Wid := Get_Wire_Id (Asgn); if Wid = Wid1 or Wid = Wid2 then @@ -278,6 +280,7 @@ package body Synth.Environment is else Set_Assign_Chain (Last, Asgn); end if; + Phi.Nbr := Phi.Nbr + 1; Last := Asgn; end if; Asgn := Next_Asgn; |