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| author | Tristan Gingold <tgingold@free.fr> | 2020-01-08 07:27:14 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-01-08 07:28:29 +0100 |
| commit | e4384df2d52f319b2a8e45b3a1a26277d88760b5 (patch) | |
| tree | db40677456c84e8f159d4d94190589237e173344 /src/synth/synth-environment.adb | |
| parent | 513ea00c0d355c1534b8ed6f28a78ca15c91d612 (diff) | |
| download | ghdl-e4384df2d52f319b2a8e45b3a1a26277d88760b5.tar.gz ghdl-e4384df2d52f319b2a8e45b3a1a26277d88760b5.tar.bz2 ghdl-e4384df2d52f319b2a8e45b3a1a26277d88760b5.zip | |
synth: improve support of out/inout variable parameters.
Diffstat (limited to 'src/synth/synth-environment.adb')
| -rw-r--r-- | src/synth/synth-environment.adb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/synth/synth-environment.adb b/src/synth/synth-environment.adb index 0f5d8816e..58fd0f0d8 100644 --- a/src/synth/synth-environment.adb +++ b/src/synth/synth-environment.adb @@ -64,7 +64,9 @@ package body Synth.Environment is is Wire_Rec : Wire_Id_Record renames Wire_Id_Table.Table (Wid); begin + -- Check the wire was not already free. pragma Assert (Wire_Rec.Kind /= Wire_None); + pragma Assert (Wire_Rec.Cur_Assign = No_Seq_Assign); Wire_Rec.Kind := Wire_None; end Free_Wire; |