| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | vhdl: Iir_Kind_Foreign_Module is now a library unit | Tristan Gingold | 2021-11-09 | 1 | -0/+2 |
| * | vhdl/psl: handle PSL inherit spec. For #1899 | Tristan Gingold | 2021-11-05 | 1 | -10/+11 |
| * | synth: Support alias declarations in vunit | tmeissner | 2021-11-02 | 1 | -2/+4 |
| * | synth: do full elaboration before synthesis | Tristan Gingold | 2021-11-01 | 1 | -0/+673 |
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index : iCE40/ghdl | |
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