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authorTristan Gingold <tgingold@free.fr>2021-11-05 07:33:37 +0100
committerTristan Gingold <tgingold@free.fr>2021-11-05 07:33:37 +0100
commite6551b07a7137790e2deb554718d5bed2d4467b4 (patch)
treea49f84aaf8341ed4f081bcef1ad8256d1443ae60 /src/synth/elab-vhdl_insts.adb
parentb0f3a909b0ee15b57b6999706fe1327f97a48a6c (diff)
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vhdl/psl: handle PSL inherit spec. For #1899
Diffstat (limited to 'src/synth/elab-vhdl_insts.adb')
-rw-r--r--src/synth/elab-vhdl_insts.adb21
1 files changed, 11 insertions, 10 deletions
diff --git a/src/synth/elab-vhdl_insts.adb b/src/synth/elab-vhdl_insts.adb
index 4a1eb7331..f2f53bb68 100644
--- a/src/synth/elab-vhdl_insts.adb
+++ b/src/synth/elab-vhdl_insts.adb
@@ -360,7 +360,8 @@ package body Elab.Vhdl_Insts is
while Item /= Null_Node loop
case Get_Kind (Item) is
when Iir_Kind_Psl_Default_Clock
- | Iir_Kind_Psl_Declaration =>
+ | Iir_Kind_Psl_Declaration
+ | Iir_Kind_PSL_Inherit_Spec =>
null;
when Iir_Kind_Psl_Assert_Directive
| Iir_Kind_Psl_Assume_Directive
@@ -368,15 +369,15 @@ package body Elab.Vhdl_Insts is
| Iir_Kind_Psl_Restrict_Directive =>
null;
when Iir_Kind_Signal_Declaration
- | Iir_Kind_Constant_Declaration
- | Iir_Kind_Function_Declaration
- | Iir_Kind_Procedure_Declaration
- | Iir_Kind_Function_Body
- | Iir_Kind_Procedure_Body
- | Iir_Kind_Attribute_Declaration
- | Iir_Kind_Attribute_Specification
- | Iir_Kind_Object_Alias_Declaration
- | Iir_Kind_Non_Object_Alias_Declaration =>
+ | Iir_Kind_Constant_Declaration
+ | Iir_Kind_Function_Declaration
+ | Iir_Kind_Procedure_Declaration
+ | Iir_Kind_Function_Body
+ | Iir_Kind_Procedure_Body
+ | Iir_Kind_Attribute_Declaration
+ | Iir_Kind_Attribute_Specification
+ | Iir_Kind_Object_Alias_Declaration
+ | Iir_Kind_Non_Object_Alias_Declaration =>
Elab_Declaration (Unit_Inst, Item, Last_Type);
when Iir_Kinds_Concurrent_Signal_Assignment
| Iir_Kinds_Process_Statement