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* simul: use synth_declarations for processes and proceduresTristan Gingold2022-09-171-3/+2
* synth: factorize code (reuse synth_constant_declaration)Tristan Gingold2022-09-171-1/+1
* synth: handle protected types in subprogramsTristan Gingold2022-09-171-31/+3
* synth: preliminary work to factorize codeTristan Gingold2022-09-161-13/+5
* simul: improve error handling during elaborationTristan Gingold2022-09-161-0/+1
* simul: add support for protected objectsTristan Gingold2022-09-081-1/+53
* simul: fix computation for number of driversTristan Gingold2022-09-061-1/+2
* synth: handle generics in blocksTristan Gingold2022-09-061-2/+18
* synth: use areapoolsTristan Gingold2022-09-021-4/+32
* simul: detect multiple drivers for unresolved signalsTristan Gingold2022-09-021-8/+93
* synth: handle indexes/ranges in configurations for generate blocksTristan Gingold2022-08-251-1/+2
* simul: handle conversions and associations with constantsTristan Gingold2022-08-241-27/+26
* simul: factorize code to compute number of sourcesTristan Gingold2022-08-231-0/+35
* simul: add extra drivers for ports without sourcesTristan Gingold2022-08-231-10/+76
* simul: handle individual associationsTristan Gingold2022-08-171-2/+7
* simul: add create_connectsTristan Gingold2022-08-171-37/+38
* simul: create terminals (WIP)Tristan Gingold2022-08-171-1/+2
* simul: gather terminalsTristan Gingold2022-07-251-0/+29
* src/simul: rewrite of ghdl/simul based on synthTristan Gingold2022-07-241-0/+677
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