aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* vhdl-sem_inst: handle suspend_stateTristan Gingold2023-01-048-186/+333
* ghdlsimul: do late semantic checksTristan Gingold2023-01-041-1/+19
* synth: check length of selector in case statementTristan Gingold2023-01-041-0/+4
* synth: fix handling of target aggregate in conditional variable assignmentTristan Gingold2023-01-041-3/+4
* simul: handle force/release signal assignmentsTristan Gingold2023-01-036-18/+221
* synth: handle more 2008 aggregatesTristan Gingold2023-01-033-11/+43
* synth-vhdl_aggr: minor renamingTristan Gingold2023-01-031-8/+9
* synth: introduce type_array_unboundedTristan Gingold2023-01-0313-48/+143
* synth: fix handling of record subtypes for objectsTristan Gingold2023-01-031-0/+1
* synth: adjust exec_name_subtype for function callsTristan Gingold2023-01-031-0/+7
* simul: skip psl default clock in declarationsTristan Gingold2023-01-031-0/+1
* synth: add support of interface subprogramTristan Gingold2023-01-033-31/+33
* synth: improve support of vhdl-08 arraysTristan Gingold2023-01-023-13/+40
* synth: fix to_string for characterTristan Gingold2023-01-022-1/+12
* synth: add support for nested packagesTristan Gingold2023-01-023-19/+87
* synth: elaborate case generate statementsTristan Gingold2023-01-016-18/+74
* simul: handle nested packagesTristan Gingold2023-01-013-1/+19
* testsuite/gna: add a test for #2288Tristan Gingold2022-12-312-0/+45
* trans-chap7: handle unbounded expressions in aggregates.Tristan Gingold2022-12-311-24/+39
* elab-vhdl_expr: fix a crash on simple aggregateTristan Gingold2022-12-311-8/+2
* synth: handle string literals in debugTristan Gingold2022-12-311-1/+2
* synth: add statement in context, adjust path/instance name attributesTristan Gingold2022-12-3110-43/+92
* grt-files_operations: allow last line without EOLTristan Gingold2022-12-311-1/+4
* Merge pull request #2289 from Paebbels/paebbels/pyVHDLModel-updatestgingold2022-12-3135-224/+507
|\
| * Formatting by black.Patrick Lehmann2022-12-304-6/+24
| * Bumped dependency to pyVHDLModel to v0.20.2Patrick Lehmann2022-12-302-3/+3
| * Fixed handling of Use clauses in packages.Patrick Lehmann2022-12-301-2/+5
| * Bumped dependency to pyVHDLModel to v0.20.0Patrick Lehmann2022-12-301-1/+1
| * Improved VHDL example project.Patrick Lehmann2022-12-298-62/+77
| * Added Get***Symbol functions. Improved Symbol handling.Patrick Lehmann2022-12-297-89/+192
| * Fixed duplicate testcase name (Vital).Patrick Lehmann2022-12-271-1/+1
| * Fixed context and package names and their references in VHDL example code.Patrick Lehmann2022-12-279-11/+20
| * Fixed glob pattern in DOM CLI test program.Patrick Lehmann2022-12-271-2/+2
| * Improved prettyprint.Patrick Lehmann2022-12-271-12/+12
| * Implemented GetContextSymbol and fixed how ContextReferenceSymbols are created.Patrick Lehmann2022-12-272-5/+14
| * Formatting by black.Patrick Lehmann2022-12-264-8/+13
| * Improved StopWatch testcase.Patrick Lehmann2022-12-266-52/+51
| * Replaced specific code with routines from pyVHDLModel.Patrick Lehmann2022-12-262-11/+21
| * Bumped dependecy to pyVHDLModel and added analysis time measurements.Patrick Lehmann2022-12-262-1/+16
| * More adjustments to new symbols.Patrick Lehmann2022-12-263-16/+21
| * New handling of symbols.Patrick Lehmann2022-12-264-39/+74
| * Converted more symbols for packages and contexts.Patrick Lehmann2022-12-253-15/+79
| * Removed declarations of __all__ when not needed by export.Patrick Lehmann2022-12-2513-31/+0
| * Added one-line code documentations.Patrick Lehmann2022-12-255-5/+28
| * Updated pretty printing.Patrick Lehmann2022-12-251-22/+23
* | Merge pull request #2293 from ghdl/paebbels/sphinx-version-limittgingold2022-12-311-2/+2
|\ \
| * | Limit Sphinx to 5.3 <= XX < 6.0Patrick Lehmann2022-12-311-2/+2
|/ /
* | synth: check bounds for pos and val attributesTristan Gingold2022-12-261-3/+10
* | synth: improve support of value attributeTristan Gingold2022-12-263-6/+40
* | simul: handle driving and driving_value attributesTristan Gingold2022-12-265-8/+66