iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
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*	testsuite/synth: Add testcase for previous commit (missing assoc in call).	Tristan Gingold	2019-10-13	3	-0/+67
*	synth-stmts: improve support for associations in function calls.	Tristan Gingold	2019-10-13	1	-19/+92
*	synth-inst: minor refactoring.	Tristan Gingold	2019-10-13	1	-3/+2
*	synth-oper: handle unsigned unsigned mul.	Tristan Gingold	2019-10-13	1	-0/+13
*	synth-expr: handle integer type conversion.	Tristan Gingold	2019-10-13	1	-1/+4
*	synth-expr: handle range array attribute in slices.	Tristan Gingold	2019-10-13	1	-42/+74
*	vhdl-annotations: handle list of record elements declaration.	Tristan Gingold	2019-10-13	1	-2/+4
*	vhdl: recognize std_logic_unsigned.conv_integer.	Tristan Gingold	2019-10-13	4	-20/+31
*	netlists-iterators: avoid a crash if no ports.	Tristan Gingold	2019-10-13	1	-3/+1
*	netlists-dump: improve output.	Tristan Gingold	2019-10-13	1	-9/+28
*	netlists-builders: adjust names of dyn_extract ports.	Tristan Gingold	2019-10-13	1	-2/+2
*	Show error on wait without condition (#976)	Pepijn de Vos	2019-10-13	1	-0/+4
*	add record (in)equality (#975)	Pepijn de Vos	2019-10-13	1	-2/+4
*	vhdl: recognize conv_integer functions from std_logic_arith.	Tristan Gingold	2019-10-11	7	-195/+218
*	vhdl: recognize std_logic_signed package (from synopsys).	Tristan Gingold	2019-10-11	9	-24/+85
*	vhdl: recognize minus from std_logic_unsigned	Tristan Gingold	2019-10-11	4	-23/+44
*	vhdl: do not try to recognize mentor version of std_logic_arith.	Tristan Gingold	2019-10-10	1	-0/+7
*	synth: remove synth-types	Tristan Gingold	2019-10-10	4	-91/+13
*	netlists: add internings child package.	Tristan Gingold	2019-10-10	3	-14/+61
*	ghdlsynth: add --out=none to not display the result.	Tristan Gingold	2019-10-10	1	-1/+6
*	netlists-disp_vhdl: fix pasto on id_asr.	Tristan Gingold	2019-10-10	1	-5/+5
*	vhdl: improve error message for redefinition of library	Tristan Gingold	2019-10-10	1	-1/+1
*	testsuite/synth: add testcase for previous commit.	Tristan Gingold	2019-10-10	3	-0/+70
*	synth: handle constants for enum equality.	Tristan Gingold	2019-10-10	1	-1/+5
*	netlists: give a name to the free module.	Tristan Gingold	2019-10-10	1	-2/+4
*	synth: rewrite cleanup pass.	Tristan Gingold	2019-10-10	7	-68/+188
*	synth-decls: ignore use clauses.	Tristan Gingold	2019-10-10	1	-0/+2
*	synth-opeer: extend synth_uresize	Tristan Gingold	2019-10-10	1	-1/+1
*	synth-oper: handle more operators.	Tristan Gingold	2019-10-10	1	-3/+6
*	vhdl: recognize conv_unsigned from ieee.std_logic_arith.	Tristan Gingold	2019-10-10	8	-175/+382
*	testsuite/synth: add testcase for previous commit.	Tristan Gingold	2019-10-09	3	-1/+47
*	synth: set name on generate statements.	Tristan Gingold	2019-10-09	2	-6/+16
*	synth: set location on instances.	Tristan Gingold	2019-10-09	1	-0/+1
*	synth: use synth.source for setting location.	Tristan Gingold	2019-10-09	8	-17/+34
*	testsuite/synth: add a test for aggregate to net.	Tristan Gingold	2019-10-09	3	-0/+85
*	netlists-disp_vhdl: handle const_SB32	Tristan Gingold	2019-10-09	1	-1/+2
*	testsuite/synth: add a test for previous commit.	Tristan Gingold	2019-10-09	3	-1/+51
*	synth-environment: fix a thinko.	Tristan Gingold	2019-10-09	1	-1/+2
*	synth: improve support of procedure calls.	Tristan Gingold	2019-10-08	1	-20/+25
*	testsuite/syn: add testcase for #973	Tristan Gingold	2019-10-08	3	-0/+54
*	synth: handle read-only aliases. Fix #973	Tristan Gingold	2019-10-08	1	-1/+9
*	synth-context: fix encoding of discrete in aggregate	Tristan Gingold	2019-10-08	1	-1/+1
*	testsuite/synth: add a test for the previous commit.	Tristan Gingold	2019-10-08	4	-2/+41
*	synth-disp_vhdl: fix incorrect code for record of width	Tristan Gingold	2019-10-08	1	-1/+3
*	synth: fix mul sgn sgn width.	Tristan Gingold	2019-10-08	2	-8/+9
*	testsuite/synth: add tests for previous commit.	Tristan Gingold	2019-10-08	7	-1/+298
*	synth: fix incorrect order for concat.	Tristan Gingold	2019-10-08	2	-3/+6
*	testsuite/synth: add a test.	Tristan Gingold	2019-10-08	4	-0/+63
*	testsuite/synth: add a test for previous commit.	Tristan Gingold	2019-10-08	7	-1/+97
*	synth-disp_vhdl: handle array/record of 1 element.	Tristan Gingold	2019-10-08	1	-3/+11