| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | testsuite/gna: add a test for #2209 | Tristan Gingold | 2022-10-08 | 2 | -0/+19 | |
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| * | vhdl-sem.adb(are_trees_equal): handle parenthesis expressions. | Tristan Gingold | 2022-10-08 | 1 | -0/+4 | |
| | | | | | Fix #2209 | |||||
| * | simul: signal attributes in actuals | Tristan Gingold | 2022-10-06 | 1 | -2/+4 | |
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| * | simul: complete concurrent procedure calls | Tristan Gingold | 2022-10-06 | 3 | -29/+43 | |
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| * | simul: fix initial value of record signals | Tristan Gingold | 2022-10-06 | 1 | -2/+2 | |
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| * | simul: recompute object alias offsets | Tristan Gingold | 2022-10-06 | 1 | -1/+14 | |
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| * | simul: fix signal attribute or guard as actual in connections | Tristan Gingold | 2022-10-06 | 2 | -11/+15 | |
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| * | simul: improve debugger (display of signals value) | Tristan Gingold | 2022-10-06 | 4 | -38/+74 | |
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| * | simul: handle suspendable procedure call from sensitized process. | Tristan Gingold | 2022-10-05 | 2 | -3/+11 | |
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| * | testsuite/synth: add a reproducer for #2205 | Tristan Gingold | 2022-10-04 | 2 | -0/+40 | |
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| * | elab-vhdl_objtypes(unshare): handle slice_type. Fix #2205 | Tristan Gingold | 2022-10-04 | 1 | -2/+4 | |
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| * | testsuite/synth: add a test for #2204 | Tristan Gingold | 2022-10-03 | 6 | -0/+158 | |
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| * | synth: avoid crash on invalid hdl in psl. Fix #2204 | Tristan Gingold | 2022-10-03 | 3 | -17/+46 | |
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| * | gh action: replace ubuntu 18 by ubuntu 22 (without docker) | Tristan Gingold | 2022-10-03 | 2 | -31/+51 | |
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| * | workflow: back to ubuntu 18. | Tristan Gingold | 2022-10-03 | 1 | -3/+3 | |
| | | | | | Requires more work, done in a branch | |||||
| * | workflow: use llvm-14 on unbuntu-22 | Tristan Gingold | 2022-10-02 | 1 | -1/+1 | |
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| * | workflows: tentatively build on ubuntu22 | Tristan Gingold | 2022-10-02 | 2 | -4/+4 | |
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| * | github actions: use llvm14 on macosx | Tristan Gingold | 2022-10-02 | 1 | -1/+1 | |
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| * | translate, grt: add lib function for div and rem. | Tristan Gingold | 2022-10-02 | 6 | -8/+148 | |
| | | | | | | Do not rely on hardware exceptions to catch division by 0, they are caught in windows by the c handler and not propagated | |||||
| * | synth: improve error recovery | Tristan Gingold | 2022-10-02 | 1 | -0/+3 | |
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| * | synth: detect division by 0, handle universal real/integer division | Tristan Gingold | 2022-10-02 | 1 | -3/+23 | |
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| * | testsuite/synth: add a test for ghdl/ghdl-yosys-plugin#174 | Tristan Gingold | 2022-10-02 | 2 | -0/+37 | |
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| * | synth-vhdl_stmts: handle passive process. Fix ghdl/ghdl-yosys-plugin#174 | Tristan Gingold | 2022-10-02 | 1 | -18/+204 | |
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| * | synth: avoid a crash on literal overflow | Tristan Gingold | 2022-10-01 | 1 | -1/+10 | |
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| * | synth: avoid on crash on overflow in ranges | Tristan Gingold | 2022-10-01 | 1 | -0/+8 | |
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| * | synth: improve handling of individual generic associations | Tristan Gingold | 2022-10-01 | 1 | -17/+22 | |
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| * | simul: finalize empty procedures | Tristan Gingold | 2022-10-01 | 1 | -9/+11 | |
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| * | simul: minor rewrite | Tristan Gingold | 2022-10-01 | 1 | -3/+2 | |
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| * | simul: finalize declarations of procedure calls | Tristan Gingold | 2022-10-01 | 2 | -0/+6 | |
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| * | synth: handle read for floats | Tristan Gingold | 2022-09-30 | 2 | -8/+24 | |
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| * | synth: handle float-float conversions | Tristan Gingold | 2022-09-30 | 1 | -3/+14 | |
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| * | simul: handle stable attribute | Tristan Gingold | 2022-09-30 | 2 | -5/+44 | |
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| * | synth: factorize code | Tristan Gingold | 2022-09-30 | 2 | -8/+9 | |
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| * | simul: create disconnections | Tristan Gingold | 2022-09-30 | 1 | -1/+42 | |
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| * | testsuite/gna: add a test for the previous commit | Tristan Gingold | 2022-09-30 | 2 | -0/+16 | |
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| * | libraries.adb: do not set location of entity name of architecture. | Tristan Gingold | 2022-09-30 | 1 | -1/+0 | |
| | | | | | As the location was the one from the library file, which is unloaded. | |||||
| * | testsuite/gna: add a test for #2193 | Tristan Gingold | 2022-09-30 | 3 | -0/+84 | |
| | | | | | close #2193 | |||||
| * | testsuite/gna: rename issue and close #2202 | Tristan Gingold | 2022-09-30 | 2 | -0/+0 | |
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| * | ortho/llvm6: handle llvm 15 (opaque pointers) | Tristan Gingold | 2022-09-29 | 1 | -39/+64 | |
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| * | simul: handle quiet attribute | Tristan Gingold | 2022-09-29 | 4 | -12/+88 | |
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| * | simul: factorize code, add sub_signal_type | Tristan Gingold | 2022-09-29 | 4 | -92/+73 | |
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| * | vhdl-canon: extract guard for signal assignment sensitivity | Tristan Gingold | 2022-09-29 | 1 | -1/+15 | |
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| * | simul: support guarded signal assignments (WIP) | Tristan Gingold | 2022-09-29 | 1 | -8/+79 | |
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| * | testsuite/gna: adjust baseline | Tristan Gingold | 2022-09-29 | 1 | -15/+15 | |
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| * | synth: handle guard signal in debugger | Tristan Gingold | 2022-09-28 | 3 | -57/+78 | |
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| * | simul: handle last_value attribute | Tristan Gingold | 2022-09-28 | 3 | -1/+31 | |
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| * | synth: handle guard signal in expressions | Tristan Gingold | 2022-09-28 | 2 | -0/+2 | |
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| * | simul: fix handling of labels in next/exit statements | Tristan Gingold | 2022-09-28 | 1 | -4/+13 | |
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| * | synth: handle null-range loops | Tristan Gingold | 2022-09-28 | 5 | -21/+40 | |
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| * | testsuite/gna: add a test for #2201 | Tristan Gingold | 2022-09-28 | 2 | -0/+39 | |
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index : iCE40/ghdl | |
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