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Diffstat (limited to 'testsuite/synth/issue1947/circuit.vhdl')
-rw-r--r-- | testsuite/synth/issue1947/circuit.vhdl | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/testsuite/synth/issue1947/circuit.vhdl b/testsuite/synth/issue1947/circuit.vhdl new file mode 100644 index 000000000..28aec7af0 --- /dev/null +++ b/testsuite/synth/issue1947/circuit.vhdl @@ -0,0 +1,41 @@ +library ieee; +use ieee.std_logic_1164.all; +package some_generic_package is + generic ( + some_param : natural + ); + procedure some_proc ( + variable some_var : out std_logic + ); +end; +package body some_generic_package is + procedure some_proc ( + variable some_var : out std_logic + ) is + begin + end; +end package body; + +library ieee; +use ieee.std_logic_1164.all; +entity circuit is + port ( + clk : std_logic + ); +end; +package package_instance is new work.some_generic_package + generic map( + 4 + ); +use work.package_instance.all; +architecture rtl of circuit is +begin + process + variable some_var : std_logic; + begin + wait until clk; + + some_proc(some_var); + + end process; +end architecture; |