diff options
| -rw-r--r-- | testsuite/synth/issue1414/Makefile | 23 | ||||
| -rw-r--r-- | testsuite/synth/issue1414/cover_overlap_misparse.vhdl | 23 | ||||
| -rwxr-xr-x | testsuite/synth/issue1414/testsuite.sh | 13 |
3 files changed, 59 insertions, 0 deletions
diff --git a/testsuite/synth/issue1414/Makefile b/testsuite/synth/issue1414/Makefile new file mode 100644 index 000000000..e8033ac60 --- /dev/null +++ b/testsuite/synth/issue1414/Makefile @@ -0,0 +1,23 @@ +GHDL=ghdl +GHDLFLAGS=--ieee=synopsys -O2 + +MODULES= \ + test.vhd \ + +.PHONY: +all: elaboration.done + ./tb --ieee-asserts=disable --dump-rti + +elaboration.done: analyse.done + $(GHDL) -e $(GHDLFLAGS) -o tb tb + touch $@ + +analyse.done: $(MODULES) + echo Building rofl... + $(GHDL) -a $(GHDLFLAGS) $^ + touch $@ + +.PHONY: +clean: + echo "Cleaning up..." + rm -f *.o *.cf *.done *.ghw tb diff --git a/testsuite/synth/issue1414/cover_overlap_misparse.vhdl b/testsuite/synth/issue1414/cover_overlap_misparse.vhdl new file mode 100644 index 000000000..895bcf715 --- /dev/null +++ b/testsuite/synth/issue1414/cover_overlap_misparse.vhdl @@ -0,0 +1,23 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; +use IEEE.NUMERIC_STD.ALL; + +entity cover_overlap_misparse is + Port ( + clk: in STD_LOGIC; + counter_val: out STD_LOGIC_VECTOR(3 downto 0) + ); +end entity; + +architecture Behavioral of cover_overlap_misparse is + signal ctr_internal: UNSIGNED(3 downto 0) := x"0"; +begin + process(clk) is + begin + ctr_internal <= ctr_internal + 1; + end process; + counter_val <= STD_LOGIC_VECTOR(ctr_internal); + + -- psl default clock is rising_edge(clk); + --psl assert always ctr_internal = 0 |-> ctr_internal = 0; +end Behavioral; diff --git a/testsuite/synth/issue1414/testsuite.sh b/testsuite/synth/issue1414/testsuite.sh new file mode 100755 index 000000000..dae071911 --- /dev/null +++ b/testsuite/synth/issue1414/testsuite.sh @@ -0,0 +1,13 @@ +#! /bin/sh + +. ../../testenv.sh + +synth -fpsl --no-assert-cover cover_overlap_misparse.vhdl -e > syn_nocover.vhdl +! grep -q cover syn_nocover.vhdl + +synth -fpsl cover_overlap_misparse.vhdl -e > syn_cover.vhdl +grep -q cover syn_cover.vhdl + +clean + +echo "Test successful" |