diff options
| -rw-r--r-- | pyGHDL/dom/Type.py | 6 | ||||
| -rw-r--r-- | pyGHDL/dom/_Translate.py | 18 |
2 files changed, 22 insertions, 2 deletions
diff --git a/pyGHDL/dom/Type.py b/pyGHDL/dom/Type.py index 69cf97af0..1576eb849 100644 --- a/pyGHDL/dom/Type.py +++ b/pyGHDL/dom/Type.py @@ -37,6 +37,7 @@ from pyVHDLModel.VHDLModel import ( IntegerType as VHDLModel_IntegerType, EnumeratedType as VHDLModel_EnumeratedType, ArrayType as VHDLModel_ArrayType, + RecordTypeElement as VHDLModel_RecordTypeElement, RecordType as VHDLModel_RecordType, AccessType as VHDLModel_AccessType, SubType as VHDLModel_SubType, @@ -63,6 +64,11 @@ class ArrayType(VHDLModel_ArrayType): @export +class RecordTypeElement(VHDLModel_RecordTypeElement): + pass + + +@export class RecordType(VHDLModel_RecordType): pass diff --git a/pyGHDL/dom/_Translate.py b/pyGHDL/dom/_Translate.py index 7239da77c..a3e3a7c96 100644 --- a/pyGHDL/dom/_Translate.py +++ b/pyGHDL/dom/_Translate.py @@ -57,7 +57,14 @@ from pyGHDL.dom.Symbol import ( ConstrainedSubTypeSymbol, IndexedObjectOrFunctionCallSymbol, ) -from pyGHDL.dom.Type import IntegerType, SubType, ArrayType, RecordType, EnumeratedType +from pyGHDL.dom.Type import ( + IntegerType, + SubType, + ArrayType, + RecordType, + EnumeratedType, + RecordTypeElement, +) from pyGHDL.dom.Range import Range, RangeExpression from pyGHDL.dom.Literal import ( IntegerLiteral, @@ -198,8 +205,15 @@ def GetTypeFromNode(node: Iir) -> BaseType: return ArrayType(typeName) elif kind == nodes.Iir_Kind.Record_Type_Definition: + elements = [] + elementDeclarations = nodes.Get_Elements_Declaration_List(typeDefinition) + for element in utils.flist_iter(elementDeclarations): + elementName = GetNameOfNode(element) + elementType = None # GetSubtypeIndicationFromNode(element) + + elements.append(RecordTypeElement(elementName, elementType)) - return RecordType(typeName) + return RecordType(typeName, elements) else: position = GetPositionOfNode(typeDefinition) raise DOMException( |