testsuite/synth: add a test for #2062

4 files changed, 51 insertions, 0 deletions

diff --git a/testsuite/synth/issue2062/fxt.vhdl b/testsuite/synth/issue2062/fxt.vhdl
new file mode 100644
index 000000000..8ee26e5a2
--- /dev/null
+++ b/testsuite/synth/issue2062/fxt.vhdl
@@ -0,0 +1,15 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+use work.fixed_pkg.all;
+
+entity fxt is port (
+   a : in  std_logic_vector(6 downto 0);
+   y : out ufixed(3 downto -2));
+end entity;
+
+architecture beh of fxt is
+begin
+   y <= to_ufixed(a, 5, 1);
+end beh;
diff --git a/testsuite/synth/issue2062/fxt2.vhdl b/testsuite/synth/issue2062/fxt2.vhdl
new file mode 100644
index 000000000..a63ff4d7e
--- /dev/null
+++ b/testsuite/synth/issue2062/fxt2.vhdl
@@ -0,0 +1,14 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+use ieee.fixed_pkg.all;
+
+entity fxt2 is port (
+   a : in  std_logic_vector(5 downto 0);
+   y : out ufixed(3 downto -2));
+end entity;
+
+architecture beh of fxt2 is
+begin
+   y <= to_ufixed(a, 6, 1);
+end beh;
diff --git a/testsuite/synth/issue2062/repro.vhdl b/testsuite/synth/issue2062/repro.vhdl
new file mode 100644
index 000000000..2b676415c
--- /dev/null
+++ b/testsuite/synth/issue2062/repro.vhdl
@@ -0,0 +1,12 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity repro is port (
+   a : in  std_logic_vector(5 downto 0);
+   y : out std_ulogic_vector(3 downto -2));
+end entity;
+
+architecture beh of repro is
+begin
+  y <= to_stdulogicvector(a);
+end beh;
diff --git a/testsuite/synth/issue2062/testsuite.sh b/testsuite/synth/issue2062/testsuite.sh
new file mode 100755
index 000000000..7ca626bd5
--- /dev/null
+++ b/testsuite/synth/issue2062/testsuite.sh
@@ -0,0 +1,10 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+synth_only repro
+
+GHDL_STD_FLAGS=--std=08
+synth_only fxt2
+
+echo "Test successful"