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Diffstat (limited to 'testsuite/synth/issue2062/repro.vhdl')
-rw-r--r-- | testsuite/synth/issue2062/repro.vhdl | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/testsuite/synth/issue2062/repro.vhdl b/testsuite/synth/issue2062/repro.vhdl new file mode 100644 index 000000000..2b676415c --- /dev/null +++ b/testsuite/synth/issue2062/repro.vhdl @@ -0,0 +1,12 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity repro is port ( + a : in std_logic_vector(5 downto 0); + y : out std_ulogic_vector(3 downto -2)); +end entity; + +architecture beh of repro is +begin + y <= to_stdulogicvector(a); +end beh; |