synth: add testcase for falling edge.

2 files changed, 19 insertions, 0 deletions

diff --git a/testsuite/synth/dff01/dff08.vhdl b/testsuite/synth/dff01/dff08.vhdl
new file mode 100644
index 000000000..7cdb79a84
--- /dev/null
+++ b/testsuite/synth/dff01/dff08.vhdl
@@ -0,0 +1,18 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity dff08 is
+  port (q : out std_logic;
+        d : std_logic;
+        clk : std_logic);
+end dff08;
+
+architecture behav of dff08 is
+begin
+  process (clk) is
+  begin
+    if falling_edge (clk) then
+      q <= d;
+    end if;
+  end process;
+end behav;
diff --git a/testsuite/synth/dff01/testsuite.sh b/testsuite/synth/dff01/testsuite.sh
index dc50aa0ff..216c2dbce 100755
--- a/testsuite/synth/dff01/testsuite.sh
+++ b/testsuite/synth/dff01/testsuite.sh
@@ -9,6 +9,7 @@ synth dff04.vhdl -e dff04
 synth dff05.vhdl -e dff05
 synth dff06.vhdl -e dff06
 synth dff07.vhdl -e dff07
+synth dff08.vhdl -e dff08
 
 clean