testsuite/synth: add a test for ghdl/ghdl-yosys-plugin#104

1 files changed, 27 insertions, 0 deletions

diff --git a/testsuite/synth/synth104/case02.vhdl b/testsuite/synth/synth104/case02.vhdl
new file mode 100644
index 000000000..f2a0ec3cb
--- /dev/null
+++ b/testsuite/synth/synth104/case02.vhdl
@@ -0,0 +1,27 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity case02 is
+  port (
+    sel : in unsigned(3 downto 0);
+    det : out std_logic_vector(1 downto 0)
+    );
+end case02;
+
+architecture behavior of case02 is
+begin
+  tc: process(sel)
+  begin
+    case to_integer(sel) is
+      when 0 to 1 =>
+        det <= "00";
+      when 2 | 7 downto 4 =>
+        det <= "01";
+      when 3 | 12 downto 10 | 8 to 9 =>
+        det <= "10";
+      when others =>
+        det <= "11";
+    end case;
+  end process;
+end behavior;