testsuite/synth: add a test for ghdl/ghdl-yosys-plugin#104

6 files changed, 149 insertions, 0 deletions

diff --git a/testsuite/synth/synth104/case02.vhdl b/testsuite/synth/synth104/case02.vhdl
new file mode 100644
index 000000000..f2a0ec3cb
--- /dev/null
+++ b/testsuite/synth/synth104/case02.vhdl
@@ -0,0 +1,27 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity case02 is
+  port (
+    sel : in unsigned(3 downto 0);
+    det : out std_logic_vector(1 downto 0)
+    );
+end case02;
+
+architecture behavior of case02 is
+begin
+  tc: process(sel)
+  begin
+    case to_integer(sel) is
+      when 0 to 1 =>
+        det <= "00";
+      when 2 | 7 downto 4 =>
+        det <= "01";
+      when 3 | 12 downto 10 | 8 to 9 =>
+        det <= "10";
+      when others =>
+        det <= "11";
+    end case;
+  end process;
+end behavior;
diff --git a/testsuite/synth/synth104/tb_case02.vhdl b/testsuite/synth/synth104/tb_case02.vhdl
new file mode 100644
index 000000000..9f781bb29
--- /dev/null
+++ b/testsuite/synth/synth104/tb_case02.vhdl
@@ -0,0 +1,39 @@
+entity tb_case02 is
+end tb_case02;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of tb_case02 is
+  signal sel : unsigned (3 downto 0);
+  signal det : std_logic_vector (1 downto 0);
+begin
+  dut: entity work.case02
+    port map (sel, det);
+
+  process
+  begin
+    sel <= "0000";
+    wait for 1 ns;
+    assert det = "00" severity failure;
+
+    sel <= "0010";
+    wait for 1 ns;
+    assert det = "01" severity failure;
+
+    sel <= "0110";
+    wait for 1 ns;
+    assert det = "01" severity failure;
+
+    sel <= "1010";
+    wait for 1 ns;
+    assert det = "10" severity failure;
+
+    sel <= "1111";
+    wait for 1 ns;
+    assert det = "11" severity failure;
+
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/synth/synth104/tb_testcase1.vhdl b/testsuite/synth/synth104/tb_testcase1.vhdl
new file mode 100644
index 000000000..15cd2f507
--- /dev/null
+++ b/testsuite/synth/synth104/tb_testcase1.vhdl
@@ -0,0 +1,35 @@
+entity tb_testcase1 is
+end tb_testcase1;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of tb_testcase1 is
+  signal sel : unsigned (1 downto 0);
+  signal det : std_logic;
+begin
+  dut: entity work.testcase1
+    port map (sel, det);
+
+  process
+  begin
+    sel <= "00";
+    wait for 1 ns;
+    assert det = '0' severity failure;
+
+    sel <= "01";
+    wait for 1 ns;
+    assert det = '0' severity failure;
+
+    sel <= "10";
+    wait for 1 ns;
+    assert det = '1' severity failure;
+
+    sel <= "11";
+    wait for 1 ns;
+    assert det = '1' severity failure;
+
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/synth/synth104/tc1.v b/testsuite/synth/synth104/tc1.v
new file mode 100644
index 000000000..200a2473b
--- /dev/null
+++ b/testsuite/synth/synth104/tc1.v
@@ -0,0 +1,17 @@
+module tc1(input wire clk,
+	   input wire [3:0] sel,
+	   output reg 	    a,
+	   output reg 	    b);
+   always @(posedge clk) begin
+      casex (sel)
+	2'b10: begin
+	   a <= 1;
+	   b <= 0;
+	end
+	2'b0x:
+	  a<= 0;
+	2'b11:
+	  b <= 1;
+      endcase // casex (sel)
+   end // always @ (posedge clk)
+endmodule // tc1
diff --git a/testsuite/synth/synth104/testcase1.vhdl b/testsuite/synth/synth104/testcase1.vhdl
new file mode 100644
index 000000000..256ee0959
--- /dev/null
+++ b/testsuite/synth/synth104/testcase1.vhdl
@@ -0,0 +1,23 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity testcase1 is
+  port (
+    sel : in unsigned(1 downto 0);
+    det : out std_logic
+    );
+end testcase1;
+
+architecture behavior of testcase1 is
+begin
+  tc: process(sel)
+  begin
+    case to_integer(sel) is
+      when 0 to 1 =>
+        det <= '0';
+      when others =>
+        det <= '1';
+    end case;
+  end process;
+end behavior;
diff --git a/testsuite/synth/synth104/testsuite.sh b/testsuite/synth/synth104/testsuite.sh
new file mode 100755
index 000000000..a49d4f735
--- /dev/null
+++ b/testsuite/synth/synth104/testsuite.sh
@@ -0,0 +1,8 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+synth_tb testcase1
+synth_tb case02
+
+echo "Test successful"