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authorTristan Gingold <tgingold@free.fr>2023-01-27 22:08:39 +0100
committerTristan Gingold <tgingold@free.fr>2023-01-27 22:08:39 +0100
commit2efaa2396acf02fecc75341eb88353a325290e0b (patch)
treec6171b56b4b7ac40574dbec49ee1c9c02e2efc58 /testsuite/synth/issue2327/test_and.vhdl
parentb878e8b41bafd21df4179a223f551236fc782707 (diff)
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testsuite/synth: add tests for #2327
Diffstat (limited to 'testsuite/synth/issue2327/test_and.vhdl')
-rw-r--r--testsuite/synth/issue2327/test_and.vhdl11
1 files changed, 11 insertions, 0 deletions
diff --git a/testsuite/synth/issue2327/test_and.vhdl b/testsuite/synth/issue2327/test_and.vhdl
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+++ b/testsuite/synth/issue2327/test_and.vhdl
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+entity test is
+ port(
+ a: in bit_vector(7 downto 0);
+ b: in bit;
+ c: out bit_vector(7 downto 0));
+end test;
+
+architecture behavior of test is
+begin
+ c <= a and b;
+end behavior;