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authorTristan Gingold <tgingold@free.fr>2022-11-21 08:03:20 +0100
committerTristan Gingold <tgingold@free.fr>2022-11-21 08:03:20 +0100
commit0af513e7b59a01f456f6f76369cedf67d8ffc5cf (patch)
tree7a7fa841c07320f027f2b3e6e788cfeff4d5a4da /testsuite/pyunit/libghdl/DesignComment.vhdl
parentc1dc505cbe93ebaade1547b2e4180074bdf42a25 (diff)
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vhdl-parse: handle inside comments
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-rw-r--r--testsuite/pyunit/libghdl/DesignComment.vhdl14
1 files changed, 14 insertions, 0 deletions
diff --git a/testsuite/pyunit/libghdl/DesignComment.vhdl b/testsuite/pyunit/libghdl/DesignComment.vhdl
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+++ b/testsuite/pyunit/libghdl/DesignComment.vhdl
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+-- No copyright for :accum: design.
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity accum is
+ port (
+ -- :a: and :b: are the inputs of the adder.
+ a, b : in std_logic_vector (31 downto 0);
+ -- :res: is the result of the adder.
+ res : out std_logic_vector (31 downto 0)
+ );
+end accum;
+