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author | Tristan Gingold <tgingold@free.fr> | 2021-05-13 18:41:25 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-05-13 18:41:25 +0200 |
commit | a9f0afa140aca437d927f0329bd86f6d628659e4 (patch) | |
tree | 642a15ebec4d0ff0efb8259d549c821022f6079a /testsuite/gna | |
parent | 029c8cbb77e8a83bfa39ef7f1281c0d40141e800 (diff) | |
download | ghdl-a9f0afa140aca437d927f0329bd86f6d628659e4.tar.gz ghdl-a9f0afa140aca437d927f0329bd86f6d628659e4.tar.bz2 ghdl-a9f0afa140aca437d927f0329bd86f6d628659e4.zip |
testsuite/gna: add a test for #1757
Diffstat (limited to 'testsuite/gna')
-rw-r--r-- | testsuite/gna/issue1757/testm.vhdl | 52 | ||||
-rwxr-xr-x | testsuite/gna/issue1757/testsuite.sh | 15 |
2 files changed, 67 insertions, 0 deletions
diff --git a/testsuite/gna/issue1757/testm.vhdl b/testsuite/gna/issue1757/testm.vhdl new file mode 100644 index 000000000..0b23642fd --- /dev/null +++ b/testsuite/gna/issue1757/testm.vhdl @@ -0,0 +1,52 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity testm is + +port (clk : in std_logic; + data : in std_logic_vector(2+1 downto 0); + q1 : out std_logic_vector(3 downto 0) + ); +end testm; + +architecture rtl of testm is + +-- img_log2 function + function tlog2(d : positive) return natural is + variable tmp : positive; + begin + tmp := 1; + for count in 0 to d loop + if (tmp >= d) then + return count; + end if; + tmp := tmp*2; + end loop; + return d; + end; + + constant SBITS : integer := tlog2(16); + + signal fred : std_logic_vector(SBITS - 1 downto 0); + +begin + + fred <= data; + + process (fred) + begin + case (fred(1 downto 0)) is + when "00" => + q1 <= data; + + when "01" => + q1 <= "0000"; + + when "10" => + q1 <= data; + + when others => + q1 <= "1111"; + end case; + end process; +end rtl; diff --git a/testsuite/gna/issue1757/testsuite.sh b/testsuite/gna/issue1757/testsuite.sh new file mode 100755 index 000000000..368449f1a --- /dev/null +++ b/testsuite/gna/issue1757/testsuite.sh @@ -0,0 +1,15 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze_failure testm.vhdl + +clean + +export GHDL_STD_FLAGS=--std=08 +analyze testm.vhdl +elab_simulate testm + +clean + +echo "Test successful" |