Add issue40 testcase.

1 files changed, 36 insertions, 0 deletions

diff --git a/testsuite/gna/issue40/test.vhdl b/testsuite/gna/issue40/test.vhdl
new file mode 100644
index 000000000..ca00ece42
--- /dev/null
+++ b/testsuite/gna/issue40/test.vhdl
@@ -0,0 +1,36 @@
+library ieee;
+    use ieee.std_logic_1164.all;
+    use ieee.numeric_std.all;
+
+entity a is
+port
+(
+    foo : in std_ulogic_vector
+);
+end a;
+
+architecture rtl of a is
+begin
+end rtl;
+
+library ieee;
+    use ieee.std_logic_1164.all;
+    use ieee.numeric_std.all;
+
+entity b is
+port
+(
+    bar     : inout std_logic_vector(7 downto 0)
+);
+end b;
+
+architecture rtl of b is
+begin
+
+i_a: entity work.a
+port map
+(
+    foo => std_ulogic_vector(bar)
+);
+end rtl;
+