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author | Tristan Gingold <tgingold@free.fr> | 2021-09-18 07:10:15 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-09-18 07:10:15 +0200 |
commit | ecb84e353efaf3628a8d20407f7c336dc315793c (patch) | |
tree | a4bf5bfba9f645a106910841f63c029a6be2a979 /testsuite/gna/issue1515/ent.vhdl | |
parent | 5caf2d3a874957a07e48791ba3102e25394936b7 (diff) | |
download | ghdl-ecb84e353efaf3628a8d20407f7c336dc315793c.tar.gz ghdl-ecb84e353efaf3628a8d20407f7c336dc315793c.tar.bz2 ghdl-ecb84e353efaf3628a8d20407f7c336dc315793c.zip |
testsuite/gna: add a test for #1515
Diffstat (limited to 'testsuite/gna/issue1515/ent.vhdl')
-rw-r--r-- | testsuite/gna/issue1515/ent.vhdl | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/testsuite/gna/issue1515/ent.vhdl b/testsuite/gna/issue1515/ent.vhdl new file mode 100644 index 000000000..f6fe2ea70 --- /dev/null +++ b/testsuite/gna/issue1515/ent.vhdl @@ -0,0 +1,11 @@ +entity ent is + port ( + inp : BIT_VECTOR(1 downto 0); + outp : buffer BOOLEAN + ); +end; + +architecture a of ent is +begin + outp <= inp'delayed(1 ns)(0) = '0'; +end; |