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authorTristan Gingold <tgingold@free.fr>2018-12-15 07:41:09 +0100
committerTristan Gingold <tgingold@free.fr>2018-12-16 07:05:32 +0100
commit814d63034a45f14c6eb1d00d7446537777ed855f (patch)
treeec0a9af9eab6b8785e7b9e96e24c0bbe0899ee4b /testsuite/gna/bug094/topa.vhdl
parent6f3f9645ef7f05150dd13488025d419deb29c6da (diff)
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Tests for errors in imported units.
Diffstat (limited to 'testsuite/gna/bug094/topa.vhdl')
-rw-r--r--testsuite/gna/bug094/topa.vhdl33
1 files changed, 33 insertions, 0 deletions
diff --git a/testsuite/gna/bug094/topa.vhdl b/testsuite/gna/bug094/topa.vhdl
new file mode 100644
index 000000000..fc94dfde4
--- /dev/null
+++ b/testsuite/gna/bug094/topa.vhdl
@@ -0,0 +1,33 @@
+entity topa is
+end topa;
+
+architecture behav of topa is
+ signal clk : bit;
+ signal v : bit_vector (31 downto 0);
+ signal done : boolean := false;
+begin
+ dut : entity work.enta
+ port map (clk => clk,
+ data => v);
+
+ process
+ begin
+ clk <= '0';
+ wait for 10 ns;
+ clk <= '1';
+ wait for 10 ns;
+ if done then
+ wait;
+ end if;
+ end process;
+
+ process
+ begin
+ v <= x"12345678";
+ wait for 40 ns;
+ v <= x"00000000";
+ wait for 80 ns;
+ done <= true;
+ wait;
+ end process;
+end behav;