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| author | Tristan Gingold <tgingold@free.fr> | 2021-01-01 11:48:23 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2021-01-01 14:15:40 +0100 |
| commit | cbeafcc2a33209e6825e590561726cf10ef66d11 (patch) | |
| tree | f0749bc470cccf94313b16937534fd5d7b06a509 /src | |
| parent | 8c1ae5a3a429dbbbc73a8547f021b8cf6470130b (diff) | |
| download | ghdl-cbeafcc2a33209e6825e590561726cf10ef66d11.tar.gz ghdl-cbeafcc2a33209e6825e590561726cf10ef66d11.tar.bz2 ghdl-cbeafcc2a33209e6825e590561726cf10ef66d11.zip | |
synth-oper: handle ieee.numeric_std_unsigned.to_integer. Fix #1572
Diffstat (limited to 'src')
| -rw-r--r-- | src/synth/synth-oper.adb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index 7f70d641c..6d38a3936 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -1930,6 +1930,7 @@ package body Synth.Oper is | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Vector_Int => return Synth_Conv_Vector (True); when Iir_Predefined_Ieee_Numeric_Std_Toint_Uns_Nat + | Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Integer_Slv_Nat | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Log | Iir_Predefined_Ieee_Std_Logic_Unsigned_Conv_Integer => |