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author | Tristan Gingold <tgingold@free.fr> | 2019-05-05 08:28:43 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-05-05 13:55:18 +0200 |
commit | e4960acab358ebdd76d796554f962e755ec8954c (patch) | |
tree | d76cdb9d8497963a53d30d41dba05be0abe4bd1c /src/vhdl | |
parent | 83c593362bce5d1930a1bbf486a62a06c674bded (diff) | |
download | ghdl-e4960acab358ebdd76d796554f962e755ec8954c.tar.gz ghdl-e4960acab358ebdd76d796554f962e755ec8954c.tar.bz2 ghdl-e4960acab358ebdd76d796554f962e755ec8954c.zip |
vhdl: move nodes_gc to vhdl child.
Diffstat (limited to 'src/vhdl')
-rw-r--r-- | src/vhdl/vhdl-nodes_gc.adb (renamed from src/vhdl/nodes_gc.adb) | 4 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes_gc.ads (renamed from src/vhdl/nodes_gc.ads) | 4 | ||||
-rw-r--r-- | src/vhdl/vhdl-sem_lib.adb | 8 |
3 files changed, 8 insertions, 8 deletions
diff --git a/src/vhdl/nodes_gc.adb b/src/vhdl/vhdl-nodes_gc.adb index eb7d4dee3..8876528ff 100644 --- a/src/vhdl/nodes_gc.adb +++ b/src/vhdl/vhdl-nodes_gc.adb @@ -26,7 +26,7 @@ with Libraries; with Vhdl.Disp_Tree; with Vhdl.Std_Package; -package body Nodes_GC is +package body Vhdl.Nodes_GC is type Marker_Array is array (Iir range <>) of Boolean; type Marker_Array_Acc is access Marker_Array; @@ -516,4 +516,4 @@ package body Nodes_GC is raise Internal_Error; end if; end Check_Tree; -end Nodes_GC; +end Vhdl.Nodes_GC; diff --git a/src/vhdl/nodes_gc.ads b/src/vhdl/vhdl-nodes_gc.ads index 9b92b9e8b..258ab7ab9 100644 --- a/src/vhdl/nodes_gc.ads +++ b/src/vhdl/vhdl-nodes_gc.ads @@ -18,7 +18,7 @@ with Iirs; use Iirs; -package Nodes_GC is +package Vhdl.Nodes_GC is Flag_Disp_Multiref : Boolean := True; -- Perform an internal check on the tree structure of UNIT. @@ -26,4 +26,4 @@ package Nodes_GC is procedure Report_Unreferenced; -- Display nodes that aren't referenced. -end Nodes_GC; +end Vhdl.Nodes_GC; diff --git a/src/vhdl/vhdl-sem_lib.adb b/src/vhdl/vhdl-sem_lib.adb index 10f6a60cc..fe788202d 100644 --- a/src/vhdl/vhdl-sem_lib.adb +++ b/src/vhdl/vhdl-sem_lib.adb @@ -28,7 +28,7 @@ with Vhdl.Disp_Vhdl; with Vhdl.Sem; with Vhdl.Post_Sems; with Vhdl.Canon; -with Nodes_GC; +with Vhdl.Nodes_GC; package body Vhdl.Sem_Lib is procedure Error_Lib_Msg (Msg : String; Arg1 : Earg_Type) is @@ -84,7 +84,7 @@ package body Vhdl.Sem_Lib is end if; if Flags.Check_Ast_Level > 0 then - Nodes_GC.Check_Tree (Unit); + Vhdl.Nodes_GC.Check_Tree (Unit); end if; if Flags.Verbose then @@ -107,7 +107,7 @@ package body Vhdl.Sem_Lib is end if; if Flags.Check_Ast_Level > 0 then - Nodes_GC.Check_Tree (Unit); + Vhdl.Nodes_GC.Check_Tree (Unit); end if; -- Post checks @@ -142,7 +142,7 @@ package body Vhdl.Sem_Lib is end if; if Flags.Check_Ast_Level > 0 then - Nodes_GC.Check_Tree (Unit); + Vhdl.Nodes_GC.Check_Tree (Unit); end if; end Finish_Compilation; |