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author | Tristan Gingold <tgingold@free.fr> | 2022-04-05 19:14:22 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-04-05 19:14:22 +0200 |
commit | 9b14c0ac67981ca6db6c6d4861035afca1595965 (patch) | |
tree | 3f0beea15c714ac20c23d744c1af9cdd1aa7ae77 /src/vhdl | |
parent | d46c35b74f8b173363d238bf2e23bda7ae595e54 (diff) | |
download | ghdl-9b14c0ac67981ca6db6c6d4861035afca1595965.tar.gz ghdl-9b14c0ac67981ca6db6c6d4861035afca1595965.tar.bz2 ghdl-9b14c0ac67981ca6db6c6d4861035afca1595965.zip |
synth: do not add info for element subtype (except for arrays).
Fix #2021
Diffstat (limited to 'src/vhdl')
-rw-r--r-- | src/vhdl/vhdl-annotations.adb | 52 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes.ads | 1 |
2 files changed, 22 insertions, 31 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 9fc9788bf..7e1663e9a 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -324,29 +324,34 @@ package body Vhdl.Annotations is end if; when Iir_Kind_Array_Type_Definition => - El := Get_Element_Subtype (Def); - Annotate_Anonymous_Type_Definition (Block_Info, El); if Flag_Synthesis then + -- Create an annotation for the element type, as it can be + -- referenced by the implicit concat function definition for + -- concatenation with element. + El := Get_Element_Subtype (Def); + Annotate_Anonymous_Type_Definition (Block_Info, El); + + -- Then for the array. Create_Object_Info (Block_Info, Def, Kind_Type); end if; when Iir_Kind_Array_Subtype_Definition => - if Get_Array_Element_Constraint (Def) /= Null_Node - or else - (Get_Resolution_Indication (Def) /= Null_Node - and then - (Get_Kind (Get_Resolution_Indication (Def)) - = Iir_Kind_Array_Element_Resolution)) - then - -- This subtype has created a new anonymous subtype for the - -- element. - El := Get_Element_Subtype (Def); - Annotate_Type_Definition (Block_Info, El); - end if; if Flag_Synthesis then -- For the bounds. Create_Object_Info (Block_Info, Def, Kind_Type); else + if Get_Array_Element_Constraint (Def) /= Null_Node + or else + (Get_Resolution_Indication (Def) /= Null_Node + and then + (Get_Kind (Get_Resolution_Indication (Def)) + = Iir_Kind_Array_Element_Resolution)) + then + -- This subtype has created a new anonymous subtype for the + -- element. + El := Get_Element_Subtype (Def); + Annotate_Type_Definition (Block_Info, El); + end if; declare List : constant Iir_Flist := Get_Index_Subtype_List (Def); begin @@ -378,23 +383,8 @@ package body Vhdl.Annotations is when Iir_Kind_Record_Subtype_Definition => if Flag_Synthesis then - declare - List : constant Iir_Flist := - Get_Elements_Declaration_List (Def); - El : Iir; - El_Type : Iir; - begin - for I in Flist_First .. Flist_Last (List) loop - El := Get_Nth_Element (List, I); - if Get_Subtype_Indication (El) /= Null_Iir then - El_Type := Get_Type (El); - Annotate_Anonymous_Type_Definition - (Block_Info, El_Type); - end if; - end loop; - -- For the offsets. - Create_Object_Info (Block_Info, Def, Kind_Type); - end; + -- For the offsets. + Create_Object_Info (Block_Info, Def, Kind_Type); end if; when Iir_Kind_Access_Type_Definition => diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index aac961bb6..c419cc599 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -2928,6 +2928,7 @@ package Vhdl.Nodes is -- of the tree (ownership). -- Get/Set_Owned_Elements_Chain (Field6) -- + -- Chain of either element_declaration or record_element_constraint. -- Get/Set_Elements_Declaration_List (Field1) -- -- Get/Set_Subtype_Type_Mark (Field2) |