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author | Tristan Gingold <tgingold@free.fr> | 2016-10-15 14:32:32 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2016-10-15 14:32:32 +0200 |
commit | 6c9ac1f1ba0492c2d5add773d2024dd163b31db4 (patch) | |
tree | 9ccb3faa5b7f43f98acf342f6bbadcef3017c062 /src/vhdl | |
parent | 0d82b72ca11cb249888356caec800ddd43a70c82 (diff) | |
download | ghdl-6c9ac1f1ba0492c2d5add773d2024dd163b31db4.tar.gz ghdl-6c9ac1f1ba0492c2d5add773d2024dd163b31db4.tar.bz2 ghdl-6c9ac1f1ba0492c2d5add773d2024dd163b31db4.zip |
simulation: remove sim_be after previous code factorization.
Diffstat (limited to 'src/vhdl')
-rw-r--r-- | src/vhdl/simulate/annotations.adb | 19 | ||||
-rw-r--r-- | src/vhdl/simulate/elaboration.adb | 30 | ||||
-rw-r--r-- | src/vhdl/simulate/execution.adb | 69 | ||||
-rw-r--r-- | src/vhdl/simulate/sim_be.adb | 117 | ||||
-rw-r--r-- | src/vhdl/simulate/sim_be.ads | 25 |
5 files changed, 61 insertions, 199 deletions
diff --git a/src/vhdl/simulate/annotations.adb b/src/vhdl/simulate/annotations.adb index 4758b5bed..c4c6fded1 100644 --- a/src/vhdl/simulate/annotations.adb +++ b/src/vhdl/simulate/annotations.adb @@ -595,11 +595,20 @@ package body Annotations is procedure Annotate_Declaration (Block_Info: Sim_Info_Acc; Decl: Iir) is begin case Get_Kind (Decl) is - when Iir_Kind_Delayed_Attribute - | Iir_Kind_Stable_Attribute - | Iir_Kind_Quiet_Attribute - | Iir_Kind_Transaction_Attribute - | Iir_Kind_Signal_Declaration => + when Iir_Kind_Signal_Attribute_Declaration => + declare + Attr : Iir; + begin + Attr := Get_Signal_Attribute_Chain (Decl); + while Is_Valid (Attr) loop + Annotate_Anonymous_Type_Definition + (Block_Info, Get_Type (Attr)); + Create_Signal_Info (Block_Info, Attr); + Attr := Get_Attr_Chain (Attr); + end loop; + end; + + when Iir_Kind_Signal_Declaration => Annotate_Anonymous_Type_Definition (Block_Info, Get_Type (Decl)); Create_Signal_Info (Block_Info, Decl); diff --git a/src/vhdl/simulate/elaboration.adb b/src/vhdl/simulate/elaboration.adb index bc3fe1896..e96f92b3f 100644 --- a/src/vhdl/simulate/elaboration.adb +++ b/src/vhdl/simulate/elaboration.adb @@ -2530,14 +2530,28 @@ package body Elaboration is when Iir_Kind_Use_Clause => null; - when Iir_Kind_Delayed_Attribute => - Elaborate_Delayed_Signal (Instance, Decl); - when Iir_Kind_Stable_Attribute => - Elaborate_Implicit_Signal (Instance, Decl, Mode_Stable); - when Iir_Kind_Quiet_Attribute => - Elaborate_Implicit_Signal (Instance, Decl, Mode_Quiet); - when Iir_Kind_Transaction_Attribute => - Elaborate_Implicit_Signal (Instance, Decl, Mode_Transaction); + when Iir_Kind_Signal_Attribute_Declaration => + declare + Attr : Iir; + begin + Attr := Get_Signal_Attribute_Chain (Decl); + while Is_Valid (Attr) loop + case Iir_Kinds_Signal_Attribute (Get_Kind (Attr)) is + when Iir_Kind_Delayed_Attribute => + Elaborate_Delayed_Signal (Instance, Attr); + when Iir_Kind_Stable_Attribute => + Elaborate_Implicit_Signal + (Instance, Attr, Mode_Stable); + when Iir_Kind_Quiet_Attribute => + Elaborate_Implicit_Signal + (Instance, Attr, Mode_Quiet); + when Iir_Kind_Transaction_Attribute => + Elaborate_Implicit_Signal + (Instance, Attr, Mode_Transaction); + end case; + Attr := Get_Attr_Chain (Attr); + end loop; + end; when Iir_Kind_Non_Object_Alias_Declaration => null; diff --git a/src/vhdl/simulate/execution.adb b/src/vhdl/simulate/execution.adb index 936cbd3f3..41b7b2690 100644 --- a/src/vhdl/simulate/execution.adb +++ b/src/vhdl/simulate/execution.adb @@ -1990,7 +1990,8 @@ package body Execution is Set_Expr (Pos); Pos := Pos + 1; when Iir_Kind_Choice_By_Name => - Set_Expr (1 + Get_Element_Position (Get_Choice_Name (Assoc))); + Set_Expr (1 + Get_Element_Position + (Get_Named_Entity (Get_Choice_Name (Assoc)))); when Iir_Kind_Choice_By_Others => for I in Res.Val_Record.V'Range loop if Res.Val_Record.V (I) = null then @@ -2189,12 +2190,13 @@ package body Execution is end case; end Execute_Name_Aggregate; - -- Return the indexes range of dimension DIM for type or object PREFIX. - -- DIM starts at 1. - function Execute_Indexes - (Block: Block_Instance_Acc; Prefix: Iir; Dim : Iir_Int64) - return Iir_Value_Literal_Acc + -- Return the indexes range for prefix of ATTR. + function Execute_Indexes (Block: Block_Instance_Acc; Attr : Iir) + return Iir_Value_Literal_Acc is + Prefix : constant Iir := Strip_Denoting_Name (Get_Prefix (Attr)); + Dim : constant Natural := + Evaluation.Eval_Attribute_Parameter_Or_1 (Attr); begin case Get_Kind (Prefix) is when Iir_Kind_Type_Declaration @@ -2203,12 +2205,9 @@ package body Execution is Index : Iir; begin Index := Get_Nth_Element - (Get_Index_Subtype_List (Get_Type (Prefix)), - Natural (Dim - 1)); + (Get_Index_Subtype_List (Get_Type (Prefix)), Dim - 1); return Execute_Bounds (Block, Index); end; - when Iir_Kinds_Denoting_Name => - return Execute_Indexes (Block, Get_Named_Entity (Prefix), Dim); when Iir_Kind_Array_Type_Definition | Iir_Kind_Array_Subtype_Definition => Error_Kind ("execute_indexes", Prefix); @@ -2257,29 +2256,17 @@ package body Execution is return Execute_Bounds (Block, Get_Range_Constraint (Prefix)); when Iir_Kind_Range_Array_Attribute => - declare - Prefix_Val : Iir_Value_Literal_Acc; - Dim : Iir_Int64; - begin - Dim := Get_Value (Get_Parameter (Prefix)); - Prefix_Val := Execute_Indexes (Block, Get_Prefix (Prefix), Dim); - Bound := Prefix_Val; - end; + Bound := Execute_Indexes (Block, Prefix); when Iir_Kind_Reverse_Range_Array_Attribute => - declare - Dim : Iir_Int64; - begin - Dim := Get_Value (Get_Parameter (Prefix)); - Bound := Execute_Indexes (Block, Get_Prefix (Prefix), Dim); - case Bound.Dir is - when Iir_To => - Bound := Create_Range_Value - (Bound.Right, Bound.Left, Iir_Downto, Bound.Length); - when Iir_Downto => - Bound := Create_Range_Value - (Bound.Right, Bound.Left, Iir_To, Bound.Length); - end case; - end; + Bound := Execute_Indexes (Block, Prefix); + case Bound.Dir is + when Iir_To => + Bound := Create_Range_Value + (Bound.Right, Bound.Left, Iir_Downto, Bound.Length); + when Iir_Downto => + Bound := Create_Range_Value + (Bound.Right, Bound.Left, Iir_To, Bound.Length); + end case; when Iir_Kind_Floating_Type_Definition | Iir_Kind_Integer_Type_Definition => @@ -3057,33 +3044,27 @@ package body Execution is return Execute_Low_Limit (Res); when Iir_Kind_High_Array_Attribute => - Res := Execute_Indexes - (Block, Get_Prefix (Expr), Get_Value (Get_Parameter (Expr))); + Res := Execute_Indexes (Block, Expr); return Execute_High_Limit (Res); when Iir_Kind_Low_Array_Attribute => - Res := Execute_Indexes - (Block, Get_Prefix (Expr), Get_Value (Get_Parameter (Expr))); + Res := Execute_Indexes (Block, Expr); return Execute_Low_Limit (Res); when Iir_Kind_Left_Array_Attribute => - Res := Execute_Indexes - (Block, Get_Prefix (Expr), Get_Value (Get_Parameter (Expr))); + Res := Execute_Indexes (Block, Expr); return Execute_Left_Limit (Res); when Iir_Kind_Right_Array_Attribute => - Res := Execute_Indexes - (Block, Get_Prefix (Expr), Get_Value (Get_Parameter (Expr))); + Res := Execute_Indexes (Block, Expr); return Execute_Right_Limit (Res); when Iir_Kind_Length_Array_Attribute => - Res := Execute_Indexes - (Block, Get_Prefix (Expr), Get_Value (Get_Parameter (Expr))); + Res := Execute_Indexes (Block, Expr); return Execute_Length (Res); when Iir_Kind_Ascending_Array_Attribute => - Res := Execute_Indexes - (Block, Get_Prefix (Expr), Get_Value (Get_Parameter (Expr))); + Res := Execute_Indexes (Block, Expr); return Boolean_To_Lit (Res.Dir = Iir_To); when Iir_Kind_Event_Attribute => diff --git a/src/vhdl/simulate/sim_be.adb b/src/vhdl/simulate/sim_be.adb deleted file mode 100644 index 59eacc814..000000000 --- a/src/vhdl/simulate/sim_be.adb +++ /dev/null @@ -1,117 +0,0 @@ --- Interpreter back-end --- Copyright (C) 2014 Tristan Gingold --- --- GHDL is free software; you can redistribute it and/or modify it under --- the terms of the GNU General Public License as published by the Free --- Software Foundation; either version 2, or (at your option) any later --- version. --- --- GHDL is distributed in the hope that it will be useful, but WITHOUT ANY --- WARRANTY; without even the implied warranty of MERCHANTABILITY or --- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License --- for more details. --- --- You should have received a copy of the GNU General Public License --- along with GHDL; see the file COPYING. If not, write to the Free --- Software Foundation, 59 Temple Place - Suite 330, Boston, MA --- 02111-1307, USA. - -with Ada.Text_IO; -with Sem; -with Canon; -with Annotations; -with Disp_Tree; -with Errorout; use Errorout; -with Flags; -with Disp_Vhdl; -with Post_Sems; - -package body Sim_Be is - procedure Finish_Compilation (Unit: Iir_Design_Unit; Main: Boolean := False) - is - use Ada.Text_IO; - Lib_Unit : constant Iir := Get_Library_Unit (Unit); - begin - -- Semantic analysis. - - if Flags.Verbose then - Put_Line ("analyze " & Disp_Node (Lib_Unit)); - end if; - Sem.Semantic (Unit); - - if (Main or Flags.Dump_All) and then Flags.Dump_Sem then - Disp_Tree.Disp_Tree (Unit); - end if; - - if Errorout.Nbr_Errors > 0 then - raise Compilation_Error; - end if; - - if (Main or Flags.List_All) and then Flags.List_Sem then - Disp_Vhdl.Disp_Vhdl (Unit); - end if; - - -- Post checks - ---------------- - - Post_Sems.Post_Sem_Checks (Unit); - - if Errorout.Nbr_Errors > 0 then - raise Compilation_Error; - end if; - - - -- Canonicalisation. - ------------------ - if Flags.Verbose then - Put_Line ("canonicalize " & Disp_Node (Lib_Unit)); - end if; - - Canon.Canonicalize (Unit); - - if Errorout.Nbr_Errors > 0 then - raise Compilation_Error; - end if; - - if (Main or Flags.List_All) and then Flags.List_Canon then - Disp_Vhdl.Disp_Vhdl (Unit); - end if; - - if Flags.Flag_Elaborate then - if Get_Kind (Lib_Unit) = Iir_Kind_Architecture_Body then - declare - Config : Iir_Design_Unit; - begin - Config := Canon.Create_Default_Configuration_Declaration - (Lib_Unit); - Set_Default_Configuration_Declaration (Lib_Unit, Config); - if (Main or Flags.Dump_All) and then Flags.Dump_Canon then - Disp_Tree.Disp_Tree (Config); - end if; - if (Main or Flags.List_All) and then Flags.List_Canon then - Disp_Vhdl.Disp_Vhdl (Config); - end if; - end; - end if; - end if; - - -- Annotation. - ------------- - if Flags.Verbose then - Put_Line ("annotate " & Disp_Node (Lib_Unit)); - end if; - - Annotations.Annotate (Unit); - - if Errorout.Nbr_Errors > 0 then - raise Compilation_Error; - end if; - - if (Main or Flags.List_All) and then Flags.List_Annotate then - Disp_Vhdl.Disp_Vhdl (Unit); - end if; - if (Main or Flags.Dump_All) and then Flags.Dump_Annotate then - Disp_Tree.Disp_Tree (Unit); - end if; - end Finish_Compilation; -end Sim_Be; diff --git a/src/vhdl/simulate/sim_be.ads b/src/vhdl/simulate/sim_be.ads deleted file mode 100644 index 9256c4b68..000000000 --- a/src/vhdl/simulate/sim_be.ads +++ /dev/null @@ -1,25 +0,0 @@ --- Interpreter back-end --- Copyright (C) 2014 Tristan Gingold --- --- GHDL is free software; you can redistribute it and/or modify it under --- the terms of the GNU General Public License as published by the Free --- Software Foundation; either version 2, or (at your option) any later --- version. --- --- GHDL is distributed in the hope that it will be useful, but WITHOUT ANY --- WARRANTY; without even the implied warranty of MERCHANTABILITY or --- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License --- for more details. --- --- You should have received a copy of the GNU General Public License --- along with GHDL; see the file COPYING. If not, write to the Free --- Software Foundation, 59 Temple Place - Suite 330, Boston, MA --- 02111-1307, USA. - -with Iirs; use Iirs; - -package Sim_Be is - procedure Finish_Compilation - (Unit: Iir_Design_Unit; Main: Boolean := False); -end Sim_Be; - |