vhdl: recognize 1164 condition operator, handle in synth.

2 files changed, 17 insertions, 5 deletions

diff --git a/src/vhdl/vhdl-ieee-std_logic_1164.adb b/src/vhdl/vhdl-ieee-std_logic_1164.adb
index 14468e1c4..7ea7da787 100644
--- a/src/vhdl/vhdl-ieee-std_logic_1164.adb
+++ b/src/vhdl/vhdl-ieee-std_logic_1164.adb
@@ -250,11 +250,21 @@ package body Vhdl.Ieee.Std_Logic_1164 is
                   end case;
                   Set_Implicit_Definition (Decl, Predefined);
                end;
-            elsif Is_Scalar_Function (Decl)
-              and then Get_Identifier (Decl) = Name_Not
-            then
-               Set_Implicit_Definition
-                 (Decl, Iir_Predefined_Ieee_1164_Scalar_Not);
+            elsif Is_Scalar_Function (Decl) then
+               declare
+                  Predefined : Iir_Predefined_Functions;
+               begin
+                  case Get_Identifier (Decl) is
+                     when Name_Not =>
+                        Predefined := Iir_Predefined_Ieee_1164_Scalar_Not;
+                     when Name_Op_Condition =>
+                        Predefined :=
+                          Iir_Predefined_Ieee_1164_Condition_Operator;
+                     when others =>
+                        Predefined := Iir_Predefined_None;
+                  end case;
+                  Set_Implicit_Definition (Decl, Predefined);
+               end;
             elsif Is_Vector_Vector_Function (Decl) then
                declare
                   Predefined : Iir_Predefined_Functions;
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads
index 41ef5fd9e..a0cd6b429 100644
--- a/src/vhdl/vhdl-nodes.ads
+++ b/src/vhdl/vhdl-nodes.ads
@@ -4905,6 +4905,8 @@ package Vhdl.Nodes is
       Iir_Predefined_Ieee_1164_Vector_And_Reduce,
       Iir_Predefined_Ieee_1164_Vector_Or_Reduce,
 
+      Iir_Predefined_Ieee_1164_Condition_Operator,
+
       --  Numeric_Std.
       --  Abbreviations:
       --  Uns: Unsigned, Sgn: Signed, Nat: Natural, Int: Integer.