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authorTristan Gingold <tgingold@free.fr>2021-08-04 10:22:00 +0200
committerTristan Gingold <tgingold@free.fr>2021-08-04 10:22:00 +0200
commit377964ad44b26804482173b0fa1ec5a98f2a4862 (patch)
tree0cc9437020f20851b1e99b1abe02439f8f41168e /src/vhdl
parent71cb4d15e7340f9dfb900c08acd3df185acd54ec (diff)
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vhdl-sem_expr: add comments
Diffstat (limited to 'src/vhdl')
-rw-r--r--src/vhdl/vhdl-sem_expr.adb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-sem_expr.adb b/src/vhdl/vhdl-sem_expr.adb
index cd3d4826a..0f46a8687 100644
--- a/src/vhdl/vhdl-sem_expr.adb
+++ b/src/vhdl/vhdl-sem_expr.adb
@@ -3199,6 +3199,11 @@ package body Vhdl.Sem_Expr is
end if;
end loop;
if not Found then
+ -- LRM08 9.3.3.2 Record aggregates
+ -- If the choise OTHERS is given as a choice, it shall
+ -- represent at least one element.
+ -- GHDL: so that the type of the associated expression
+ -- is known.
Error_Msg_Sem (+El, "no element for choice others");
Ok := False;
end if;
@@ -3249,6 +3254,7 @@ package body Vhdl.Sem_Expr is
Set_Expr_Staticness (Aggr, Min (Get_Expr_Staticness (Aggr),
Expr_Staticness));
+ -- Create a constrained subtype for the aggregate type
if Ok and Add_Constraints then
declare
Rec_Type : Iir;