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| author | Tristan Gingold <tgingold@free.fr> | 2022-04-27 05:37:05 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-04-27 05:41:57 +0200 |
| commit | 2cb68775de37c6869c1d3abcd3a07a3d160452df (patch) | |
| tree | 06543f1ca78d53db1b0935ce72f12e942e4e5b2d /src/vhdl | |
| parent | d3953518b0f819040941303939ac48fac3d4b06f (diff) | |
| download | ghdl-2cb68775de37c6869c1d3abcd3a07a3d160452df.tar.gz ghdl-2cb68775de37c6869c1d3abcd3a07a3d160452df.tar.bz2 ghdl-2cb68775de37c6869c1d3abcd3a07a3d160452df.zip | |
synth-static_oper: handle bit/boolean array element operations
(at least and).
Fix #1898
Diffstat (limited to 'src/vhdl')
| -rw-r--r-- | src/vhdl/vhdl-evaluation.adb | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/vhdl/vhdl-evaluation.adb b/src/vhdl/vhdl-evaluation.adb index 1c2a8c8f2..cfbb231c6 100644 --- a/src/vhdl/vhdl-evaluation.adb +++ b/src/vhdl/vhdl-evaluation.adb @@ -1003,7 +1003,8 @@ package body Vhdl.Evaluation is Res_Type := Convert_Typ_To_Node (Mt.Typ, Btype, Orig); return Convert_Vect_To_Simple_Aggregate (Mt, Res_Type, Orig); - when Type_Logic => + when Type_Logic + | Type_Bit => return Convert_Discrete_To_Node (Read_Discrete (Mt), Btype, Orig); when others => @@ -2569,8 +2570,7 @@ package body Vhdl.Evaluation is | Iir_Predefined_TF_Element_Array_Xor | Iir_Predefined_TF_Array_Element_Xnor | Iir_Predefined_TF_Element_Array_Xnor => - -- TODO - raise Internal_Error; + return Eval_Ieee_Operator (Orig, Imp, Left, Right); when Iir_Predefined_TF_Reduction_And | Iir_Predefined_TF_Reduction_Or |