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authorTristan Gingold <tgingold@free.fr>2019-05-05 07:49:25 +0200
committerTristan Gingold <tgingold@free.fr>2019-05-05 08:05:11 +0200
commit85d360929d13e6b0bcb082f144883a43f402ce22 (patch)
treef8d8135e12393588b7704318f26304dfab272658 /src/vhdl/vhdl-sem_psl.adb
parent3c48cc2a70085eef63718e622b3d1a7b75a2f36f (diff)
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vhdl: move std_standard package to vhdl child.
Diffstat (limited to 'src/vhdl/vhdl-sem_psl.adb')
-rw-r--r--src/vhdl/vhdl-sem_psl.adb10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb
index 41a2e74d9..a528da0be 100644
--- a/src/vhdl/vhdl-sem_psl.adb
+++ b/src/vhdl/vhdl-sem_psl.adb
@@ -28,7 +28,7 @@ with Vhdl.Sem_Names;
with Std_Names;
with Iirs_Utils; use Iirs_Utils;
with Evaluation; use Evaluation;
-with Std_Package;
+with Vhdl.Std_Package;
with Ieee.Std_Logic_1164;
with Errorout; use Errorout;
with Xrefs; use Xrefs;
@@ -46,8 +46,8 @@ package body Vhdl.Sem_Psl is
return False;
end if;
Btype := Get_Base_Type (Atype);
- return Btype = Std_Package.Boolean_Type_Definition
- or else Btype = Std_Package.Bit_Type_Definition
+ return Btype = Vhdl.Std_Package.Boolean_Type_Definition
+ or else Btype = Vhdl.Std_Package.Bit_Type_Definition
or else Btype = Ieee.Std_Logic_1164.Std_Ulogic_Type;
end Is_Psl_Bool_Type;
@@ -544,7 +544,7 @@ package body Vhdl.Sem_Psl is
-- Endpoints are considered as an HDL declaration and must have a
-- type.
- Set_Type (Stmt, Std_Package.Boolean_Type_Definition);
+ Set_Type (Stmt, Vhdl.Std_Package.Boolean_Type_Definition);
Set_Expr_Staticness (Stmt, None);
Set_Visible_Flag (Stmt, True);
@@ -600,7 +600,7 @@ package body Vhdl.Sem_Psl is
if Get_Type (Cond) = Null_Iir then
Cond := Sem_Expr.Sem_Condition (Cond);
elsif Get_Base_Type (Get_Type (Cond))
- /= Std_Package.Boolean_Type_Definition
+ /= Vhdl.Std_Package.Boolean_Type_Definition
then
Cond := Sem_Expr.Insert_Condition_Operator (Cond);
end if;