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authorTristan Gingold <tgingold@free.fr>2019-05-05 08:00:35 +0200
committerTristan Gingold <tgingold@free.fr>2019-05-05 08:05:12 +0200
commit3fa8d9eb8b700044d149bdf12da6cb023568b8c0 (patch)
tree3cbd54423bad53e6db401e43ef0e4216833cd8b9 /src/vhdl/vhdl-sem_psl.adb
parent85d360929d13e6b0bcb082f144883a43f402ce22 (diff)
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vhdl: move ieee packages to vhdl children.
Diffstat (limited to 'src/vhdl/vhdl-sem_psl.adb')
-rw-r--r--src/vhdl/vhdl-sem_psl.adb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vhdl/vhdl-sem_psl.adb b/src/vhdl/vhdl-sem_psl.adb
index a528da0be..fb812706a 100644
--- a/src/vhdl/vhdl-sem_psl.adb
+++ b/src/vhdl/vhdl-sem_psl.adb
@@ -29,7 +29,7 @@ with Std_Names;
with Iirs_Utils; use Iirs_Utils;
with Evaluation; use Evaluation;
with Vhdl.Std_Package;
-with Ieee.Std_Logic_1164;
+with Vhdl.Ieee.Std_Logic_1164;
with Errorout; use Errorout;
with Xrefs; use Xrefs;
@@ -48,7 +48,7 @@ package body Vhdl.Sem_Psl is
Btype := Get_Base_Type (Atype);
return Btype = Vhdl.Std_Package.Boolean_Type_Definition
or else Btype = Vhdl.Std_Package.Bit_Type_Definition
- or else Btype = Ieee.Std_Logic_1164.Std_Ulogic_Type;
+ or else Btype = Vhdl.Ieee.Std_Logic_1164.Std_Ulogic_Type;
end Is_Psl_Bool_Type;
-- Return TRUE if EXPR type is a PSL boolean type.