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authorTristan Gingold <tgingold@free.fr>2022-08-15 09:15:10 +0200
committerTristan Gingold <tgingold@free.fr>2022-08-15 16:54:37 +0200
commit988eebde6d076261da5e94344b38445e6ed764f0 (patch)
treee4bf9fcbd2a16b786721cefe0cbf40dfe12dfa8d /src/vhdl/vhdl-nodes_walk.adb
parentda59184128af74905eb378b43df3e2047c86a9ec (diff)
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vhdl: add iir_kind_psl_boolean_parameter node. For #2178
Diffstat (limited to 'src/vhdl/vhdl-nodes_walk.adb')
-rw-r--r--src/vhdl/vhdl-nodes_walk.adb3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/vhdl/vhdl-nodes_walk.adb b/src/vhdl/vhdl-nodes_walk.adb
index bf4839d3b..63deb3b53 100644
--- a/src/vhdl/vhdl-nodes_walk.adb
+++ b/src/vhdl/vhdl-nodes_walk.adb
@@ -158,7 +158,8 @@ package body Vhdl.Nodes_Walk is
when Iir_Kinds_Simple_Concurrent_Statement
| Iir_Kind_Component_Instantiation_Statement
| Iir_Kinds_Simultaneous_Statement
- | Iir_Kind_Psl_Default_Clock =>
+ | Iir_Kind_Psl_Default_Clock
+ | Iir_Kind_Psl_Declaration =>
Status := Cb.all (Stmt);
when Iir_Kind_Block_Statement =>
Status := Cb.all (Stmt);