From 988eebde6d076261da5e94344b38445e6ed764f0 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 15 Aug 2022 09:15:10 +0200 Subject: vhdl: add iir_kind_psl_boolean_parameter node. For #2178 --- src/vhdl/vhdl-nodes_walk.adb | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/vhdl/vhdl-nodes_walk.adb') diff --git a/src/vhdl/vhdl-nodes_walk.adb b/src/vhdl/vhdl-nodes_walk.adb index bf4839d3b..63deb3b53 100644 --- a/src/vhdl/vhdl-nodes_walk.adb +++ b/src/vhdl/vhdl-nodes_walk.adb @@ -158,7 +158,8 @@ package body Vhdl.Nodes_Walk is when Iir_Kinds_Simple_Concurrent_Statement | Iir_Kind_Component_Instantiation_Statement | Iir_Kinds_Simultaneous_Statement - | Iir_Kind_Psl_Default_Clock => + | Iir_Kind_Psl_Default_Clock + | Iir_Kind_Psl_Declaration => Status := Cb.all (Stmt); when Iir_Kind_Block_Statement => Status := Cb.all (Stmt); -- cgit v1.2.3