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| author | Tristan Gingold <tgingold@free.fr> | 2019-08-30 04:05:05 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-08-30 04:05:05 +0200 |
| commit | ebbd18fca4fd5b3dd2583271392f2a53911712a9 (patch) | |
| tree | 6f254c212f26df9aef3568eb5865895916d2eca7 /src/vhdl/vhdl-annotations.adb | |
| parent | a4d58954c0b541150166b26fadb159bbdd338337 (diff) | |
| download | ghdl-ebbd18fca4fd5b3dd2583271392f2a53911712a9.tar.gz ghdl-ebbd18fca4fd5b3dd2583271392f2a53911712a9.tar.bz2 ghdl-ebbd18fca4fd5b3dd2583271392f2a53911712a9.zip | |
vhdl-annotations: ignore conditional variable assignment.
Diffstat (limited to 'src/vhdl/vhdl-annotations.adb')
| -rw-r--r-- | src/vhdl/vhdl-annotations.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 18640794a..0b15f37b0 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -880,7 +880,8 @@ package body Vhdl.Annotations is when Iir_Kind_Simple_Signal_Assignment_Statement | Iir_Kind_Selected_Waveform_Assignment_Statement | Iir_Kind_Conditional_Signal_Assignment_Statement - | Iir_Kind_Variable_Assignment_Statement => + | Iir_Kind_Variable_Assignment_Statement + | Iir_Kind_Conditional_Variable_Assignment_Statement => null; when Iir_Kind_Procedure_Call_Statement => null; |