From ebbd18fca4fd5b3dd2583271392f2a53911712a9 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Fri, 30 Aug 2019 04:05:05 +0200 Subject: vhdl-annotations: ignore conditional variable assignment. --- src/vhdl/vhdl-annotations.adb | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/vhdl/vhdl-annotations.adb') diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 18640794a..0b15f37b0 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -880,7 +880,8 @@ package body Vhdl.Annotations is when Iir_Kind_Simple_Signal_Assignment_Statement | Iir_Kind_Selected_Waveform_Assignment_Statement | Iir_Kind_Conditional_Signal_Assignment_Statement - | Iir_Kind_Variable_Assignment_Statement => + | Iir_Kind_Variable_Assignment_Statement + | Iir_Kind_Conditional_Variable_Assignment_Statement => null; when Iir_Kind_Procedure_Call_Statement => null; -- cgit v1.2.3