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authorTristan Gingold <tgingold@free.fr>2017-11-07 06:29:21 +0100
committerTristan Gingold <tgingold@free.fr>2017-11-07 06:29:21 +0100
commit06d553f9d32184ad71f47bbcfcde2528d40408ac (patch)
treebd4bfcdc43394ccf59a0209079f90c6983929e0e /src/vhdl/translate
parent8ffc472d4def7cb5fb6b0d1af41e217f88a474e6 (diff)
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Use Flist for records.
Diffstat (limited to 'src/vhdl/translate')
-rw-r--r--src/vhdl/translate/trans-chap3.adb80
-rw-r--r--src/vhdl/translate/trans-chap4.adb17
-rw-r--r--src/vhdl/translate/trans-chap7.adb22
-rw-r--r--src/vhdl/translate/trans-chap8.adb9
-rw-r--r--src/vhdl/translate/trans-foreach_non_composite.adb5
-rw-r--r--src/vhdl/translate/trans-rtis.adb5
6 files changed, 57 insertions, 81 deletions
diff --git a/src/vhdl/translate/trans-chap3.adb b/src/vhdl/translate/trans-chap3.adb
index e585cc747..3538a6ac6 100644
--- a/src/vhdl/translate/trans-chap3.adb
+++ b/src/vhdl/translate/trans-chap3.adb
@@ -409,15 +409,14 @@ package body Trans.Chap3 is
when Iir_Kind_Record_Type_Definition
| Iir_Kind_Record_Subtype_Definition =>
declare
+ List : constant Iir_Flist :=
+ Get_Elements_Declaration_List (Get_Base_Type (Def));
El : Iir;
Res : Natural;
- List : Iir_List;
begin
Res := 2;
- List := Get_Elements_Declaration_List (Get_Base_Type (Def));
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
Res := Res + Get_File_Signature_Length (Get_Type (El));
end loop;
return Res;
@@ -448,15 +447,14 @@ package body Trans.Chap3 is
when Iir_Kind_Record_Type_Definition
| Iir_Kind_Record_Subtype_Definition =>
declare
+ List : constant Iir_Flist :=
+ Get_Elements_Declaration_List (Get_Base_Type (Def));
El : Iir;
- List : Iir_List;
begin
Res (Off) := '<';
Off := Off + 1;
- List := Get_Elements_Declaration_List (Get_Base_Type (Def));
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
Get_File_Signature (Get_Type (El), Res, Off);
end loop;
Res (Off) := '>';
@@ -577,17 +575,16 @@ package body Trans.Chap3 is
when Iir_Kind_Record_Subtype_Definition =>
declare
- El_List : constant Iir_List :=
+ El_List : constant Iir_Flist :=
Get_Elements_Declaration_List (Def);
- El_Blist : constant Iir_List :=
+ El_Blist : constant Iir_Flist :=
Get_Elements_Declaration_List (Get_Base_Type (Def));
El : Iir;
Bel : Iir;
Bel_Info : Field_Info_Acc;
begin
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (El_Blist) loop
Bel := Get_Nth_Element (El_Blist, I);
- exit when Bel = Null_Iir;
Bel_Info := Get_Info (Bel);
if Bel_Info.Field_Bound /= O_Fnode_Null then
El := Get_Nth_Element (El_List, I);
@@ -656,15 +653,14 @@ package body Trans.Chap3 is
when Iir_Kind_Record_Subtype_Definition =>
declare
- El_List : constant Iir_List :=
+ El_List : constant Iir_Flist :=
Get_Elements_Declaration_List (Def);
El : Iir;
El_Info : Field_Info_Acc;
begin
Targ := Stabilize (Targ);
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (El_List) loop
El := Get_Nth_Element (El_List, I);
- exit when El = Null_Iir;
El_Info := Get_Info (Get_Base_Element_Declaration (El));
if El_Info.Field_Bound /= O_Fnode_Null then
Create_Composite_Subtype_Bounds
@@ -1040,16 +1036,15 @@ package body Trans.Chap3 is
procedure Translate_Record_Type_Bounds
(Def : Iir_Record_Type_Definition; Info : Type_Info_Acc)
is
- List : constant Iir_List := Get_Elements_Declaration_List (Def);
+ List : constant Iir_Flist := Get_Elements_Declaration_List (Def);
El : Iir;
El_Tinfo : Type_Info_Acc;
El_Info : Field_Info_Acc;
Constr : O_Element_List;
begin
Start_Record_Type (Constr);
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
El_Tinfo := Get_Info (Get_Type (El));
if Is_Unbounded_Type (El_Tinfo) then
El_Info := Get_Info (El);
@@ -1065,7 +1060,7 @@ package body Trans.Chap3 is
procedure Translate_Record_Type (Def : Iir_Record_Type_Definition)
is
Info : constant Type_Info_Acc := Get_Info (Def);
- List : constant Iir_List := Get_Elements_Declaration_List (Def);
+ List : constant Iir_Flist := Get_Elements_Declaration_List (Def);
Is_Unbounded : constant Boolean :=
Get_Constraint_State (Def) /= Fully_Constrained;
El_List : O_Element_List;
@@ -1084,9 +1079,8 @@ package body Trans.Chap3 is
Need_Size := False;
-- First, translate the anonymous type of the elements.
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
El_Type := Get_Type (El);
if Get_Info (El_Type) = null then
Push_Identifier_Prefix (Mark, Get_Identifier (El));
@@ -1104,9 +1098,8 @@ package body Trans.Chap3 is
Info.Ortho_Type (Mode_Signal) := O_Tnode_Null;
for Kind in Mode_Value .. Type_To_Last_Object_Kind (Def) loop
Start_Record_Type (El_List);
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
Field_Info := Get_Info (El);
El_Tinfo := Get_Info (Get_Type (El));
if Is_Complex_Type (El_Tinfo)
@@ -1152,11 +1145,11 @@ package body Trans.Chap3 is
Base_Type : constant Iir := Get_Base_Type (Def);
Base_Info : constant Type_Info_Acc := Get_Info (Base_Type);
Info : constant Type_Info_Acc := Get_Info (Def);
- El_List : constant Iir_List := Get_Elements_Declaration_List (Def);
+ El_List : constant Iir_Flist := Get_Elements_Declaration_List (Def);
Type_Mark : constant Iir := Get_Subtype_Type_Mark (Def);
- El_Blist : constant Iir_List :=
+ El_Blist : constant Iir_Flist :=
Get_Elements_Declaration_List (Base_Type);
- El_Tm_List : Iir_List;
+ El_Tm_List : Iir_Flist;
El, B_El : Iir_Element_Declaration;
El_Type : Iir;
El_Btype : Iir;
@@ -1179,9 +1172,8 @@ package body Trans.Chap3 is
El_Tm_List := El_Blist;
end if;
Has_New_Constraints := False;
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (El_List) loop
El := Get_Nth_Element (El_List, I);
- exit when El = Null_Iir;
El_Type := Get_Type (El);
if Is_Fully_Constrained_Type (El) then
El_Btype := Get_Type (Get_Nth_Element (El_Tm_List, I));
@@ -1223,10 +1215,8 @@ package body Trans.Chap3 is
Start_Record_Type (Rec);
New_Record_Field (Rec, Info.S.Box_Field (Kind), Wki_Base,
Info.B.Base_Type (Kind));
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (El_Blist) loop
B_El := Get_Nth_Element (El_Blist, I);
- exit when B_El = Null_Iir;
-
El := Get_Nth_Element (El_List, I);
-- This element has been locally constrained.
@@ -1266,7 +1256,7 @@ package body Trans.Chap3 is
is
Info : constant Type_Info_Acc := Get_Info (Def);
Base : constant O_Dnode := Info.C (Kind).Builder_Base_Param;
- List : Iir_List;
+ List : constant Iir_Flist := Get_Elements_Declaration_List (Def);
El : Iir_Element_Declaration;
Off_Var : O_Dnode;
@@ -1295,10 +1285,8 @@ package body Trans.Chap3 is
New_Assign_Stmt (New_Obj (Off_Var), Off_Val);
-- Set memory for each complex element.
- List := Get_Elements_Declaration_List (Def);
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
El_Type := Get_Type (El);
El_Tinfo := Get_Info (El_Type);
if Is_Complex_Type (El_Tinfo)
@@ -1994,7 +1982,7 @@ package body Trans.Chap3 is
procedure Create_Record_Size_Var (Def : Iir; Kind : Object_Kind_Type)
is
Info : constant Type_Info_Acc := Get_Info (Def);
- List : constant Iir_List := Get_Elements_Declaration_List (Def);
+ List : constant Iir_Flist := Get_Elements_Declaration_List (Def);
El : Iir_Element_Declaration;
El_Type : Iir;
El_Tinfo : Type_Info_Acc;
@@ -2021,9 +2009,8 @@ package body Trans.Chap3 is
Res := Realign (Res, Ghdl_Signal_Ptr);
end case;
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
El_Type := Get_Type (El);
El_Tinfo := Get_Info (El_Type);
if Get_Type_Staticness (El_Type) /= Locally
@@ -2159,13 +2146,13 @@ package body Trans.Chap3 is
end;
when Iir_Kind_Record_Type_Definition =>
declare
- List : constant Iir_List := Get_Elements_Declaration_List (Def);
+ List : constant Iir_Flist :=
+ Get_Elements_Declaration_List (Def);
El : Iir;
Asub : Iir;
begin
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
Asub := Get_Type (El);
if Is_Anonymous_Type_Definition (Asub) then
Handle_A_Subtype (Asub);
@@ -2174,13 +2161,13 @@ package body Trans.Chap3 is
end;
when Iir_Kind_Record_Subtype_Definition =>
declare
- List : constant Iir_List := Get_Elements_Declaration_List (Def);
+ List : constant Iir_Flist :=
+ Get_Elements_Declaration_List (Def);
El : Iir;
Asub : Iir;
begin
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
if Get_Kind (El) = Iir_Kind_Record_Element_Constraint then
Asub := Get_Type (El);
if Is_Anonymous_Type_Definition (Asub) then
@@ -2993,7 +2980,7 @@ package body Trans.Chap3 is
end;
when Type_Mode_Unbounded_Record =>
declare
- El_List : constant Iir_List :=
+ El_List : constant Iir_Flist :=
Get_Elements_Declaration_List (Atype);
El : Iir;
El_Type : Iir;
@@ -3007,9 +2994,8 @@ package body Trans.Chap3 is
-- Size of base type
Res := New_Lit (New_Sizeof (Type_Info.B.Base_Type (Kind),
Ghdl_Index_Type));
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (El_List) loop
El := Get_Nth_Element (El_List, I);
- exit when El = Null_Iir;
El_Type := Get_Type (El);
El_Type_Info := Get_Info (El_Type);
if El_Type_Info.Type_Mode in Type_Mode_Unbounded then
diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb
index d4808ed2f..61479932a 100644
--- a/src/vhdl/translate/trans-chap4.adb
+++ b/src/vhdl/translate/trans-chap4.adb
@@ -449,16 +449,15 @@ package body Trans.Chap4 is
Init_Array_Object (Obj, Obj_Type);
when Type_Mode_Records =>
declare
- List : constant Iir_List :=
+ List : constant Iir_Flist :=
Get_Elements_Declaration_List (Obj_Type);
Sobj : Mnode;
El : Iir_Element_Declaration;
begin
Open_Temp;
Sobj := Stabilize (Obj);
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
Init_Object (Chap6.Translate_Selected_Element (Sobj, El),
Get_Type (El));
end loop;
@@ -696,7 +695,7 @@ package body Trans.Chap4 is
end;
when Type_Mode_Records =>
declare
- List : constant Iir_List :=
+ List : constant Iir_Flist :=
Get_Elements_Declaration_List (Get_Base_Type (Sig_Type));
El : Iir;
Res : O_Enode;
@@ -706,9 +705,8 @@ package body Trans.Chap4 is
begin
Ssig := Stabilize (Sig);
Res := O_Enode_Null;
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
Sig_El := Chap6.Translate_Selected_Element (Ssig, El);
E := Get_Nbr_Signals (Sig_El, Get_Type (El));
if Res /= O_Enode_Null then
@@ -758,11 +756,10 @@ package body Trans.Chap4 is
Res_Type := Get_Element_Subtype (Res_Type);
when Type_Mode_Records =>
declare
- Element : Iir;
+ El_List : constant Iir_Flist :=
+ Get_Elements_Declaration_List (Get_Base_Type (Res_Type));
+ Element : constant Iir := Get_Nth_Element (El_List, 0);
begin
- Element := Get_First_Element
- (Get_Elements_Declaration_List
- (Get_Base_Type (Res_Type)));
Res := Chap6.Translate_Selected_Element (Res, Element);
Res_Type := Get_Type (Element);
end;
diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb
index bfa70ca3b..72eaa7714 100644
--- a/src/vhdl/translate/trans-chap7.adb
+++ b/src/vhdl/translate/trans-chap7.adb
@@ -815,16 +815,15 @@ package body Trans.Chap7 is
when Iir_Kind_Record_Type_Definition
| Iir_Kind_Record_Subtype_Definition =>
declare
- Expr_Els : constant Iir_List :=
+ Expr_Els : constant Iir_Flist :=
Get_Elements_Declaration_List (Expr_Type);
- Atype_Els : constant Iir_List :=
+ Atype_Els : constant Iir_Flist :=
Get_Elements_Declaration_List (Atype);
Expr_El, Atype_El : Iir;
Expr_El_Type, Atype_El_Type : Iir;
begin
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (Expr_Els) loop
Expr_El := Get_Nth_Element (Expr_Els, I);
- exit when Expr_El = Null_Iir;
Atype_El := Get_Nth_Element (Atype_Els, I);
Expr_El_Type := Get_Type (Expr_El);
Atype_El_Type := Get_Type (Atype_El);
@@ -3139,7 +3138,7 @@ package body Trans.Chap7 is
Aggr_Type : constant Iir := Get_Type (Aggr);
Aggr_Base_Type : constant Iir_Record_Type_Definition :=
Get_Base_Type (Aggr_Type);
- El_List : constant Iir_List :=
+ El_List : constant Iir_Flist :=
Get_Elements_Declaration_List (Aggr_Base_Type);
El_Index : Natural;
Nbr_El : constant Natural := Get_Nbr_Elements (El_List);
@@ -4808,7 +4807,7 @@ package body Trans.Chap7 is
If_Blk : O_If_Block;
Le, Re : Mnode;
- El_List : Iir_List;
+ El_List : Iir_Flist;
El : Iir_Element_Declaration;
begin
if Global_Storage = O_Storage_External then
@@ -4823,9 +4822,8 @@ package body Trans.Chap7 is
-- Compare each element.
El_List := Get_Elements_Declaration_List (Rec_Type);
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (El_List) loop
El := Get_Nth_Element (El_List, I);
- exit when El = Null_Iir;
Open_Temp;
Le := Chap6.Translate_Selected_Element (L, El);
Re := Chap6.Translate_Selected_Element (R, El);
@@ -5518,17 +5516,15 @@ package body Trans.Chap7 is
New_Procedure_Call (Assocs);
when Type_Mode_Record =>
declare
- El_List : Iir_List;
+ El_List : constant Iir_Flist :=
+ Get_Elements_Declaration_List (Get_Base_Type (Val_Type));
El : Iir;
Val1 : Mnode;
begin
Open_Temp;
Val1 := Stabilize (Val);
- El_List := Get_Elements_Declaration_List
- (Get_Base_Type (Val_Type));
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (El_List) loop
El := Get_Nth_Element (El_List, I);
- exit when El = Null_Iir;
Translate_Rw
(Chap6.Translate_Selected_Element (Val1, El),
Get_Type (El), Proc);
diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb
index a4416f068..493f2336e 100644
--- a/src/vhdl/translate/trans-chap8.adb
+++ b/src/vhdl/translate/trans-chap8.adb
@@ -907,12 +907,12 @@ package body Trans.Chap8 is
procedure Translate_Variable_Rec_Aggr
(Targ : Iir_Aggregate; Targ_Type : Iir; Val : Mnode)
is
+ El_List : constant Iir_Flist :=
+ Get_Elements_Declaration_List (Get_Base_Type (Targ_Type));
Aggr_El : Iir;
- El_List : Iir_List;
El_Index : Natural;
Elem : Iir;
begin
- El_List := Get_Elements_Declaration_List (Get_Base_Type (Targ_Type));
El_Index := 0;
Aggr_El := Get_Association_Choices_Chain (Targ);
while Aggr_El /= Null_Iir loop
@@ -3943,13 +3943,12 @@ package body Trans.Chap8 is
procedure Translate_Signal_Target_Record_Aggr
(Aggr : Mnode; Target : Iir; Target_Type : Iir)
is
+ El_List : constant Iir_Flist :=
+ Get_Elements_Declaration_List (Get_Base_Type (Target_Type));
Aggr_El : Iir;
- El_List : Iir_List;
El_Index : Natural;
Element : Iir_Element_Declaration;
begin
- El_List := Get_Elements_Declaration_List
- (Get_Base_Type (Target_Type));
El_Index := 0;
Aggr_El := Get_Association_Choices_Chain (Target);
while Aggr_El /= Null_Iir loop
diff --git a/src/vhdl/translate/trans-foreach_non_composite.adb b/src/vhdl/translate/trans-foreach_non_composite.adb
index 53ac3a51b..c2dc58b7e 100644
--- a/src/vhdl/translate/trans-foreach_non_composite.adb
+++ b/src/vhdl/translate/trans-foreach_non_composite.adb
@@ -79,7 +79,7 @@ begin
when Type_Mode_Record
| Type_Mode_Unbounded_Record =>
declare
- List : constant Iir_List :=
+ List : constant Iir_Flist :=
Get_Elements_Declaration_List (Targ_Type);
Var_Record : Mnode;
Sub_Data : Data_Type;
@@ -90,9 +90,8 @@ begin
Var_Record := Stabilize (Targ);
Composite_Data :=
Prepare_Data_Record (Var_Record, Targ_Type, Data);
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (List) loop
El := Get_Nth_Element (List, I);
- exit when El = Null_Iir;
Sub_Data := Update_Data_Record (Composite_Data, Targ_Type, El);
Foreach_Non_Composite
(Chap6.Translate_Selected_Element (Var_Record, El),
diff --git a/src/vhdl/translate/trans-rtis.adb b/src/vhdl/translate/trans-rtis.adb
index a555920e7..a60138fea 100644
--- a/src/vhdl/translate/trans-rtis.adb
+++ b/src/vhdl/translate/trans-rtis.adb
@@ -1619,7 +1619,7 @@ package body Trans.Rtis is
procedure Generate_Record_Type_Definition (Atype : Iir)
is
Info : constant Type_Info_Acc := Get_Info (Atype);
- El_List : Iir_List;
+ El_List : Iir_Flist;
El : Iir;
Prev : Rti_Block;
El_Arr : O_Dnode;
@@ -1636,9 +1636,8 @@ package body Trans.Rtis is
-- Generate elements.
Push_Rti_Node (Prev, False);
- for I in Natural loop
+ for I in Flist_First .. Flist_Last (El_List) loop
El := Get_Nth_Element (El_List, I);
- exit when El = Null_Iir;
declare
El_Type : constant Iir := Get_Type (El);
Field_Info : constant Field_Info_Acc := Get_Info (El);