diff options
| -rw-r--r-- | src/vhdl/disp_vhdl.adb | 11 | ||||
| -rw-r--r-- | src/vhdl/iirs.adb | 8 | ||||
| -rw-r--r-- | src/vhdl/iirs.ads | 4 | ||||
| -rw-r--r-- | src/vhdl/iirs_utils.adb | 21 | ||||
| -rw-r--r-- | src/vhdl/iirs_utils.ads | 1 | ||||
| -rw-r--r-- | src/vhdl/nodes_meta.adb | 10 | ||||
| -rw-r--r-- | src/vhdl/parse.adb | 3 | ||||
| -rw-r--r-- | src/vhdl/sem.adb | 10 | ||||
| -rw-r--r-- | src/vhdl/sem_assocs.adb | 11 | ||||
| -rw-r--r-- | src/vhdl/sem_expr.adb | 5 | ||||
| -rw-r--r-- | src/vhdl/sem_names.adb | 2 | ||||
| -rw-r--r-- | src/vhdl/sem_types.adb | 71 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap3.adb | 80 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap4.adb | 17 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap7.adb | 22 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-chap8.adb | 9 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-foreach_non_composite.adb | 5 | ||||
| -rw-r--r-- | src/vhdl/translate/trans-rtis.adb | 5 |
18 files changed, 138 insertions, 157 deletions
diff --git a/src/vhdl/disp_vhdl.adb b/src/vhdl/disp_vhdl.adb index 4cc22f0f8..808567bf0 100644 --- a/src/vhdl/disp_vhdl.adb +++ b/src/vhdl/disp_vhdl.adb @@ -518,13 +518,12 @@ package body Disp_Vhdl is procedure Disp_Record_Element_Constraint (Def : Iir) is - El_List : constant Iir_List := Get_Elements_Declaration_List (Def); + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Def); El : Iir; Has_El : Boolean := False; begin - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; if Get_Kind (El) = Iir_Kind_Record_Element_Constraint and then Get_Parent (El) = Def then @@ -762,17 +761,15 @@ package body Disp_Vhdl is procedure Disp_Record_Type_Definition (Def: Iir_Record_Type_Definition; Indent: Count) is - List : Iir_List; + List : constant Iir_Flist := Get_Elements_Declaration_List (Def); El: Iir_Element_Declaration; Reindent : Boolean; begin Put_Line ("record"); Set_Col (Indent); - List := Get_Elements_Declaration_List (Def); Reindent := True; - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; if Reindent then Set_Col (Indent + Indentation); end if; diff --git a/src/vhdl/iirs.adb b/src/vhdl/iirs.adb index e2d217f6b..efca22532 100644 --- a/src/vhdl/iirs.adb +++ b/src/vhdl/iirs.adb @@ -3145,20 +3145,20 @@ package body Iirs is Set_Field8 (Def, El); end Set_Array_Element_Constraint; - function Get_Elements_Declaration_List (Decl : Iir) return Iir_List is + function Get_Elements_Declaration_List (Decl : Iir) return Iir_Flist is begin pragma Assert (Decl /= Null_Iir); pragma Assert (Has_Elements_Declaration_List (Get_Kind (Decl)), "no field Elements_Declaration_List"); - return Iir_To_Iir_List (Get_Field1 (Decl)); + return Iir_To_Iir_Flist (Get_Field1 (Decl)); end Get_Elements_Declaration_List; - procedure Set_Elements_Declaration_List (Decl : Iir; List : Iir_List) is + procedure Set_Elements_Declaration_List (Decl : Iir; List : Iir_Flist) is begin pragma Assert (Decl /= Null_Iir); pragma Assert (Has_Elements_Declaration_List (Get_Kind (Decl)), "no field Elements_Declaration_List"); - Set_Field1 (Decl, Iir_List_To_Iir (List)); + Set_Field1 (Decl, Iir_Flist_To_Iir (List)); end Set_Elements_Declaration_List; function Get_Designated_Type (Target : Iir) return Iir is diff --git a/src/vhdl/iirs.ads b/src/vhdl/iirs.ads index f6defecc3..b8b344580 100644 --- a/src/vhdl/iirs.ads +++ b/src/vhdl/iirs.ads @@ -6582,8 +6582,8 @@ package Iirs is -- Chains of elements of a record. -- Field: Field1 (uc) - function Get_Elements_Declaration_List (Decl : Iir) return Iir_List; - procedure Set_Elements_Declaration_List (Decl : Iir; List : Iir_List); + function Get_Elements_Declaration_List (Decl : Iir) return Iir_Flist; + procedure Set_Elements_Declaration_List (Decl : Iir; List : Iir_Flist); -- Field: Field1 Forward_Ref function Get_Designated_Type (Target : Iir) return Iir; diff --git a/src/vhdl/iirs_utils.adb b/src/vhdl/iirs_utils.adb index e48b43893..6a0c39a07 100644 --- a/src/vhdl/iirs_utils.adb +++ b/src/vhdl/iirs_utils.adb @@ -574,7 +574,8 @@ package body Iirs_Utils is end case; end Is_Parameter; - function Find_Name_In_List (List: Iir_List; Lit: Name_Id) return Iir is + function Find_Name_In_List (List: Iir_List; Lit: Name_Id) return Iir + is El: Iir; Ident: Name_Id; begin @@ -589,6 +590,19 @@ package body Iirs_Utils is return Null_Iir; end Find_Name_In_List; + function Find_Name_In_Flist (List : Iir_Flist; Lit : Name_Id) return Iir + is + El : Iir; + begin + for I in Flist_First .. Flist_Last (List) loop + El := Get_Nth_Element (List, I); + if Get_Identifier (El) = Lit then + return El; + end if; + end loop; + return Null_Iir; + end Find_Name_In_Flist; + function Find_Name_In_Chain (Chain: Iir; Lit: Name_Id) return Iir is El: Iir := Chain; @@ -1129,13 +1143,12 @@ package body Iirs_Utils is pragma Assert (Get_Constraint_State (Def) = Fully_Constrained); declare - El_List : constant Iir_List := + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Def); El : Iir; begin - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; if not Are_Bounds_Locally_Static (Get_Type (El)) then return False; end if; diff --git a/src/vhdl/iirs_utils.ads b/src/vhdl/iirs_utils.ads index 4117166aa..ad2cee1b6 100644 --- a/src/vhdl/iirs_utils.ads +++ b/src/vhdl/iirs_utils.ads @@ -39,6 +39,7 @@ package Iirs_Utils is -- Return the literal (whose name is LIT) or null_iir if not found. function Find_Name_In_Chain (Chain: Iir; Lit: Name_Id) return Iir; function Find_Name_In_List (List : Iir_List; Lit: Name_Id) return Iir; + function Find_Name_In_Flist (List : Iir_Flist; Lit: Name_Id) return Iir; -- Return TRUE if EL in an element of chain CHAIN. function Is_In_Chain (Chain : Iir; El : Iir) return Boolean; diff --git a/src/vhdl/nodes_meta.adb b/src/vhdl/nodes_meta.adb index cadc86c2a..be071c35a 100644 --- a/src/vhdl/nodes_meta.adb +++ b/src/vhdl/nodes_meta.adb @@ -177,7 +177,7 @@ package body Nodes_Meta is Field_Element_Subtype => Type_Iir, Field_Index_Constraint_List => Type_Iir_Flist, Field_Array_Element_Constraint => Type_Iir, - Field_Elements_Declaration_List => Type_Iir_List, + Field_Elements_Declaration_List => Type_Iir_Flist, Field_Designated_Type => Type_Iir, Field_Designated_Subtype_Indication => Type_Iir, Field_Index_List => Type_Iir_Flist, @@ -5917,6 +5917,8 @@ package body Nodes_Meta is return Get_Index_Subtype_Definition_List (N); when Field_Index_Constraint_List => return Get_Index_Constraint_List (N); + when Field_Elements_Declaration_List => + return Get_Elements_Declaration_List (N); when Field_Index_List => return Get_Index_List (N); when Field_Type_Marks_List => @@ -5939,6 +5941,8 @@ package body Nodes_Meta is Set_Index_Subtype_Definition_List (N, V); when Field_Index_Constraint_List => Set_Index_Constraint_List (N, V); + when Field_Elements_Declaration_List => + Set_Elements_Declaration_List (N, V); when Field_Index_List => Set_Index_List (N, V); when Field_Type_Marks_List => @@ -6083,8 +6087,6 @@ package body Nodes_Meta is return Get_Enumeration_Literal_List (N); when Field_Group_Constituent_List => return Get_Group_Constituent_List (N); - when Field_Elements_Declaration_List => - return Get_Elements_Declaration_List (N); when Field_Sensitivity_List => return Get_Sensitivity_List (N); when Field_Callees_List => @@ -6121,8 +6123,6 @@ package body Nodes_Meta is Set_Enumeration_Literal_List (N, V); when Field_Group_Constituent_List => Set_Group_Constituent_List (N, V); - when Field_Elements_Declaration_List => - Set_Elements_Declaration_List (N, V); when Field_Sensitivity_List => Set_Sensitivity_List (N, V); when Field_Callees_List => diff --git a/src/vhdl/parse.adb b/src/vhdl/parse.adb index e2c3a51f7..e459e3cbd 100644 --- a/src/vhdl/parse.adb +++ b/src/vhdl/parse.adb @@ -2154,7 +2154,6 @@ package body Parse is Res := Create_Iir (Iir_Kind_Record_Type_Definition); Set_Location (Res); El_List := Create_Iir_List; - Set_Elements_Declaration_List (Res, El_List); -- Skip 'record' Scan; @@ -2201,6 +2200,8 @@ package body Parse is exit when Current_Token = Tok_End; end loop; + Set_Elements_Declaration_List (Res, List_To_Flist (El_List)); + -- Skip 'end' Scan_Expect (Tok_Record); Set_End_Has_Reserved_Id (Res, True); diff --git a/src/vhdl/sem.adb b/src/vhdl/sem.adb index c0cfcae61..41b85a299 100644 --- a/src/vhdl/sem.adb +++ b/src/vhdl/sem.adb @@ -1399,14 +1399,14 @@ package body Sem is return False; end if; declare - L_Left, L_Right : Iir_List; + L_Left : constant Iir_Flist := + Get_Elements_Declaration_List (Left); + L_Right : constant Iir_Flist := + Get_Elements_Declaration_List (Right); begin - L_Left := Get_Elements_Declaration_List (Left); - L_Right := Get_Elements_Declaration_List (Right); - for I in Natural loop + for I in Flist_First .. Flist_Last (L_Left) loop El_Left := Get_Nth_Element (L_Left, I); El_Right := Get_Nth_Element (L_Right, I); - exit when El_Left = Null_Iir; if not Are_Trees_Equal (El_Left, El_Right) then return False; end if; diff --git a/src/vhdl/sem_assocs.adb b/src/vhdl/sem_assocs.adb index e15d9184d..fc7ca955f 100644 --- a/src/vhdl/sem_assocs.adb +++ b/src/vhdl/sem_assocs.adb @@ -979,8 +979,9 @@ package body Sem_Assocs is procedure Finish_Individual_Assoc_Record (Assoc : Iir; Atype : Iir) is - El_List : constant Iir_List := Get_Elements_Declaration_List (Atype); - Matches : Iir_Array (0 .. Get_Nbr_Elements (El_List) - 1); + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Atype); + Nbr_El : constant Natural := Get_Nbr_Elements (El_List); + Matches : Iir_Array (0 .. Nbr_El - 1); Ch : Iir; Pos : Natural; Rec_El : Iir; @@ -1012,7 +1013,7 @@ package body Sem_Assocs is -- Some (sub-)elements are unbounded, create a bounded subtype. declare Ntype : Iir; - Nel_List : Iir_List; + Nel_List : Iir_Flist; Nrec_El : Iir; Rec_El_Type : Iir; Staticness : Iir_Staticness; @@ -1024,7 +1025,7 @@ package body Sem_Assocs is Set_Resolution_Indication (Ntype, Get_Resolution_Indication (Atype)); end if; - Nel_List := Create_Iir_List; + Nel_List := Create_Iir_Flist (Nbr_El); Set_Elements_Declaration_List (Ntype, Nel_List); Staticness := Locally; @@ -1054,7 +1055,7 @@ package body Sem_Assocs is end if; Staticness := Min (Staticness, Get_Type_Staticness (Get_Type (Nrec_El))); - Append_Element (Nel_List, Nrec_El); + Set_Nth_Element (Nel_List, I, Nrec_El); end loop; Set_Type_Staticness (Ntype, Staticness); Set_Constraint_State (Ntype, Fully_Constrained); diff --git a/src/vhdl/sem_expr.adb b/src/vhdl/sem_expr.adb index 664272182..19287295f 100644 --- a/src/vhdl/sem_expr.adb +++ b/src/vhdl/sem_expr.adb @@ -2794,7 +2794,8 @@ package body Sem_Expr is return boolean is Base_Type : constant Iir := Get_Base_Type (A_Type); - El_List : constant Iir_List := Get_Elements_Declaration_List (Base_Type); + El_List : constant Iir_Flist := + Get_Elements_Declaration_List (Base_Type); -- Type of the element. El_Type : Iir; @@ -2843,7 +2844,7 @@ package body Sem_Expr is Ok := False; return Ass; end if; - Aggr_El := Find_Name_In_List (El_List, Get_Identifier (Expr)); + Aggr_El := Find_Name_In_Flist (El_List, Get_Identifier (Expr)); if Aggr_El = Null_Iir then Error_Msg_Sem (+Ass, "record has no such element %n", +Ass); Ok := False; diff --git a/src/vhdl/sem_names.adb b/src/vhdl/sem_names.adb index d16ef8897..dbb0e8143 100644 --- a/src/vhdl/sem_names.adb +++ b/src/vhdl/sem_names.adb @@ -1944,7 +1944,7 @@ package body Sem_Names is return; end if; - Rec_El := Find_Name_In_List + Rec_El := Find_Name_In_Flist (Get_Elements_Declaration_List (Name_Type), Suffix); if Rec_El = Null_Iir then -- No such element in the record type. diff --git a/src/vhdl/sem_types.adb b/src/vhdl/sem_types.adb index cddeacb4f..fa3696776 100644 --- a/src/vhdl/sem_types.adb +++ b/src/vhdl/sem_types.adb @@ -101,13 +101,12 @@ package body Sem_Types is when Iir_Kind_Record_Type_Definition | Iir_Kind_Record_Subtype_Definition => declare - El_List : constant Iir_List := + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Atype); El : Iir; begin - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; Set_Type_Has_Signal (Get_Type (El)); end loop; end; @@ -806,8 +805,8 @@ package body Sem_Types is -- Analyzed type of previous element Last_Type : Iir; - El_List : constant Iir_List := Get_Elements_Declaration_List (Def); - El: Iir; + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Def); + El : Iir; El_Type : Iir; Resolved_Flag : Boolean; Type_Staticness : Iir_Staticness; @@ -823,10 +822,8 @@ package body Sem_Types is Constraint := Fully_Constrained; Set_Signal_Type_Flag (Def, True); - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; - El_Type := Get_Subtype_Indication (El); if El_Type /= Null_Iir then -- Be careful for a declaration list (r,g,b: integer). @@ -1373,16 +1370,14 @@ package body Sem_Types is -- Create a copy of elements_declaration_list of SRC and set it to DST. procedure Copy_Record_Elements_Declaration_List (Dst : Iir; Src : Iir) is - El_List, New_El_List : Iir_List; + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Src); + New_El_List : Iir_Flist; El, New_El : Iir; begin - New_El_List := Create_Iir_List; + New_El_List := Create_Iir_Flist (Get_Nbr_Elements (El_List)); Set_Elements_Declaration_List (Dst, New_El_List); - El_List := Get_Elements_Declaration_List (Src); - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; - New_El := Create_Iir (Iir_Kind_Element_Declaration); Location_Copy (New_El, El); Set_Parent (New_El, Dst); @@ -1391,7 +1386,7 @@ package body Sem_Types is Set_Base_Element_Declaration (New_El, Get_Base_Element_Declaration (El)); Set_Element_Position (New_El, Get_Element_Position (El)); - Append_Element (New_El_List, New_El); + Set_Nth_Element (New_El_List, I, New_El); end loop; end Copy_Record_Elements_Declaration_List; @@ -1755,13 +1750,10 @@ package body Sem_Types is El_List : Iir_List; El : Iir; begin - if Get_Prefix (Def) /= Null_Iir then - raise Internal_Error; - end if; + pragma Assert (Get_Prefix (Def) = Null_Iir); Res := Create_Iir (Iir_Kind_Record_Subtype_Definition); Location_Copy (Res, Def); El_List := Create_Iir_List; - Set_Elements_Declaration_List (Res, El_List); Chain := Get_Association_Chain (Def); while Chain /= Null_Iir loop if Get_Kind (Chain) /= Iir_Kind_Association_Element_By_Expression @@ -1776,6 +1768,7 @@ package body Sem_Types is end if; Chain := Get_Chain (Chain); end loop; + Set_Elements_Declaration_List (Res, List_To_Flist (El_List)); return Res; end Reparse_As_Record_Constraint; @@ -1842,12 +1835,12 @@ package body Sem_Types is (Def : Iir; Type_Mark : Iir; Resolution : Iir) return Iir is Res : Iir; - El_List, Tm_El_List : Iir_List; + El_List, Tm_El_List : Iir_Flist; El : Iir; Tm_El : Iir; Tm_El_Type : Iir; El_Type : Iir; - Res_List : Iir_List; + Res_List : Iir_Flist; Index_List : Iir_Flist; Index_El : Iir; @@ -1865,20 +1858,18 @@ package body Sem_Types is Free_Name (Def); Set_Signal_Type_Flag (Res, Get_Signal_Type_Flag (Type_Mark)); Set_Constraint_State (Res, Get_Constraint_State (Type_Mark)); - El_List := Null_Iir_List; + El_List := Null_Iir_Flist; when Iir_Kind_Array_Subtype_Definition => -- Record constraints are parsed as array constraints. pragma Assert (Get_Kind (Def) = Iir_Kind_Array_Subtype_Definition); Index_List := Get_Index_Constraint_List (Def); - El_List := Create_Iir_List; + El_List := Create_Iir_Flist (Get_Nbr_Elements (Index_List)); Set_Elements_Declaration_List (Res, El_List); for I in Flist_First .. Flist_Last (Index_List) loop Index_El := Get_Nth_Element (Index_List, I); El := Reparse_As_Record_Element_Constraint (Index_El); - if El /= Null_Iir then - Append_Element (El_List, El); - end if; + Set_Nth_Element (El_List, I, El); end loop; when Iir_Kind_Record_Subtype_Definition => @@ -1889,7 +1880,7 @@ package body Sem_Types is Error_Kind ("sem_record_constraint", Def); end case; - Res_List := Null_Iir_List; + Res_List := Null_Iir_Flist; if Resolution /= Null_Iir then case Get_Kind (Resolution) is when Iir_Kinds_Denoting_Name => @@ -1906,7 +1897,7 @@ package body Sem_Types is end if; Tm_El_List := Get_Elements_Declaration_List (Type_Mark); - if El_List /= Null_Iir_List or Res_List /= Null_Iir_List then + if El_List /= Null_Iir_Flist or Res_List /= Null_Iir_Flist then -- Constraints (either range or resolution) have been added. declare Nbr_Els : constant Natural := Get_Nbr_Elements (Tm_El_List); @@ -1917,11 +1908,11 @@ package body Sem_Types is Staticness : Iir_Staticness; begin -- Fill ELS with record constraints. - if El_List /= Null_Iir_List then - for I in Natural loop + if El_List /= Null_Iir_Flist then + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; - Tm_El := Find_Name_In_List (Tm_El_List, Get_Identifier (El)); + Tm_El := + Find_Name_In_Flist (Tm_El_List, Get_Identifier (El)); if Tm_El = Null_Iir then -- Constraint element references an element name that -- doesn't exist. @@ -1963,15 +1954,15 @@ package body Sem_Types is end if; end loop; -- Record element constraints are now in Els. - Destroy_Iir_List (El_List); + Destroy_Iir_Flist (El_List); end if; -- Fill Res_Els (handle resolution constraints). - if Res_List /= Null_Iir_List then - for I in Natural loop + if Res_List /= Null_Iir_Flist then + for I in Flist_First .. Flist_Last (Res_List) loop El := Get_Nth_Element (Res_List, I); - exit when El = Null_Iir; - Tm_El := Find_Name_In_List (Tm_El_List, Get_Identifier (El)); + Tm_El := + Find_Name_In_Flist (Tm_El_List, Get_Identifier (El)); if Tm_El = Null_Iir then Error_Msg_Sem (+El, "%n has no %n", (+Type_Mark, +El)); else @@ -1987,11 +1978,11 @@ package body Sem_Types is end if; --Free_Iir (El); end loop; - Destroy_Iir_List (Res_List); + Destroy_Iir_Flist (Res_List); end if; -- Build elements list. - El_List := Create_Iir_List; + El_List := Create_Iir_Flist (Nbr_Els); Set_Elements_Declaration_List (Res, El_List); Constraint := Fully_Constrained; Staticness := Locally; @@ -2021,7 +2012,7 @@ package body Sem_Types is Res_Els (I)); Set_Type (El, El_Type); end if; - Append_Element (El_List, El); + Set_Nth_Element (El_List, I, El); Constraint := Update_Record_Constraint (Constraint, El_Type); Staticness := Min (Staticness, Get_Type_Staticness (El_Type)); end loop; diff --git a/src/vhdl/translate/trans-chap3.adb b/src/vhdl/translate/trans-chap3.adb index e585cc747..3538a6ac6 100644 --- a/src/vhdl/translate/trans-chap3.adb +++ b/src/vhdl/translate/trans-chap3.adb @@ -409,15 +409,14 @@ package body Trans.Chap3 is when Iir_Kind_Record_Type_Definition | Iir_Kind_Record_Subtype_Definition => declare + List : constant Iir_Flist := + Get_Elements_Declaration_List (Get_Base_Type (Def)); El : Iir; Res : Natural; - List : Iir_List; begin Res := 2; - List := Get_Elements_Declaration_List (Get_Base_Type (Def)); - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; Res := Res + Get_File_Signature_Length (Get_Type (El)); end loop; return Res; @@ -448,15 +447,14 @@ package body Trans.Chap3 is when Iir_Kind_Record_Type_Definition | Iir_Kind_Record_Subtype_Definition => declare + List : constant Iir_Flist := + Get_Elements_Declaration_List (Get_Base_Type (Def)); El : Iir; - List : Iir_List; begin Res (Off) := '<'; Off := Off + 1; - List := Get_Elements_Declaration_List (Get_Base_Type (Def)); - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; Get_File_Signature (Get_Type (El), Res, Off); end loop; Res (Off) := '>'; @@ -577,17 +575,16 @@ package body Trans.Chap3 is when Iir_Kind_Record_Subtype_Definition => declare - El_List : constant Iir_List := + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Def); - El_Blist : constant Iir_List := + El_Blist : constant Iir_Flist := Get_Elements_Declaration_List (Get_Base_Type (Def)); El : Iir; Bel : Iir; Bel_Info : Field_Info_Acc; begin - for I in Natural loop + for I in Flist_First .. Flist_Last (El_Blist) loop Bel := Get_Nth_Element (El_Blist, I); - exit when Bel = Null_Iir; Bel_Info := Get_Info (Bel); if Bel_Info.Field_Bound /= O_Fnode_Null then El := Get_Nth_Element (El_List, I); @@ -656,15 +653,14 @@ package body Trans.Chap3 is when Iir_Kind_Record_Subtype_Definition => declare - El_List : constant Iir_List := + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Def); El : Iir; El_Info : Field_Info_Acc; begin Targ := Stabilize (Targ); - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; El_Info := Get_Info (Get_Base_Element_Declaration (El)); if El_Info.Field_Bound /= O_Fnode_Null then Create_Composite_Subtype_Bounds @@ -1040,16 +1036,15 @@ package body Trans.Chap3 is procedure Translate_Record_Type_Bounds (Def : Iir_Record_Type_Definition; Info : Type_Info_Acc) is - List : constant Iir_List := Get_Elements_Declaration_List (Def); + List : constant Iir_Flist := Get_Elements_Declaration_List (Def); El : Iir; El_Tinfo : Type_Info_Acc; El_Info : Field_Info_Acc; Constr : O_Element_List; begin Start_Record_Type (Constr); - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; El_Tinfo := Get_Info (Get_Type (El)); if Is_Unbounded_Type (El_Tinfo) then El_Info := Get_Info (El); @@ -1065,7 +1060,7 @@ package body Trans.Chap3 is procedure Translate_Record_Type (Def : Iir_Record_Type_Definition) is Info : constant Type_Info_Acc := Get_Info (Def); - List : constant Iir_List := Get_Elements_Declaration_List (Def); + List : constant Iir_Flist := Get_Elements_Declaration_List (Def); Is_Unbounded : constant Boolean := Get_Constraint_State (Def) /= Fully_Constrained; El_List : O_Element_List; @@ -1084,9 +1079,8 @@ package body Trans.Chap3 is Need_Size := False; -- First, translate the anonymous type of the elements. - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; El_Type := Get_Type (El); if Get_Info (El_Type) = null then Push_Identifier_Prefix (Mark, Get_Identifier (El)); @@ -1104,9 +1098,8 @@ package body Trans.Chap3 is Info.Ortho_Type (Mode_Signal) := O_Tnode_Null; for Kind in Mode_Value .. Type_To_Last_Object_Kind (Def) loop Start_Record_Type (El_List); - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; Field_Info := Get_Info (El); El_Tinfo := Get_Info (Get_Type (El)); if Is_Complex_Type (El_Tinfo) @@ -1152,11 +1145,11 @@ package body Trans.Chap3 is Base_Type : constant Iir := Get_Base_Type (Def); Base_Info : constant Type_Info_Acc := Get_Info (Base_Type); Info : constant Type_Info_Acc := Get_Info (Def); - El_List : constant Iir_List := Get_Elements_Declaration_List (Def); + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Def); Type_Mark : constant Iir := Get_Subtype_Type_Mark (Def); - El_Blist : constant Iir_List := + El_Blist : constant Iir_Flist := Get_Elements_Declaration_List (Base_Type); - El_Tm_List : Iir_List; + El_Tm_List : Iir_Flist; El, B_El : Iir_Element_Declaration; El_Type : Iir; El_Btype : Iir; @@ -1179,9 +1172,8 @@ package body Trans.Chap3 is El_Tm_List := El_Blist; end if; Has_New_Constraints := False; - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; El_Type := Get_Type (El); if Is_Fully_Constrained_Type (El) then El_Btype := Get_Type (Get_Nth_Element (El_Tm_List, I)); @@ -1223,10 +1215,8 @@ package body Trans.Chap3 is Start_Record_Type (Rec); New_Record_Field (Rec, Info.S.Box_Field (Kind), Wki_Base, Info.B.Base_Type (Kind)); - for I in Natural loop + for I in Flist_First .. Flist_Last (El_Blist) loop B_El := Get_Nth_Element (El_Blist, I); - exit when B_El = Null_Iir; - El := Get_Nth_Element (El_List, I); -- This element has been locally constrained. @@ -1266,7 +1256,7 @@ package body Trans.Chap3 is is Info : constant Type_Info_Acc := Get_Info (Def); Base : constant O_Dnode := Info.C (Kind).Builder_Base_Param; - List : Iir_List; + List : constant Iir_Flist := Get_Elements_Declaration_List (Def); El : Iir_Element_Declaration; Off_Var : O_Dnode; @@ -1295,10 +1285,8 @@ package body Trans.Chap3 is New_Assign_Stmt (New_Obj (Off_Var), Off_Val); -- Set memory for each complex element. - List := Get_Elements_Declaration_List (Def); - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; El_Type := Get_Type (El); El_Tinfo := Get_Info (El_Type); if Is_Complex_Type (El_Tinfo) @@ -1994,7 +1982,7 @@ package body Trans.Chap3 is procedure Create_Record_Size_Var (Def : Iir; Kind : Object_Kind_Type) is Info : constant Type_Info_Acc := Get_Info (Def); - List : constant Iir_List := Get_Elements_Declaration_List (Def); + List : constant Iir_Flist := Get_Elements_Declaration_List (Def); El : Iir_Element_Declaration; El_Type : Iir; El_Tinfo : Type_Info_Acc; @@ -2021,9 +2009,8 @@ package body Trans.Chap3 is Res := Realign (Res, Ghdl_Signal_Ptr); end case; - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; El_Type := Get_Type (El); El_Tinfo := Get_Info (El_Type); if Get_Type_Staticness (El_Type) /= Locally @@ -2159,13 +2146,13 @@ package body Trans.Chap3 is end; when Iir_Kind_Record_Type_Definition => declare - List : constant Iir_List := Get_Elements_Declaration_List (Def); + List : constant Iir_Flist := + Get_Elements_Declaration_List (Def); El : Iir; Asub : Iir; begin - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; Asub := Get_Type (El); if Is_Anonymous_Type_Definition (Asub) then Handle_A_Subtype (Asub); @@ -2174,13 +2161,13 @@ package body Trans.Chap3 is end; when Iir_Kind_Record_Subtype_Definition => declare - List : constant Iir_List := Get_Elements_Declaration_List (Def); + List : constant Iir_Flist := + Get_Elements_Declaration_List (Def); El : Iir; Asub : Iir; begin - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; if Get_Kind (El) = Iir_Kind_Record_Element_Constraint then Asub := Get_Type (El); if Is_Anonymous_Type_Definition (Asub) then @@ -2993,7 +2980,7 @@ package body Trans.Chap3 is end; when Type_Mode_Unbounded_Record => declare - El_List : constant Iir_List := + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Atype); El : Iir; El_Type : Iir; @@ -3007,9 +2994,8 @@ package body Trans.Chap3 is -- Size of base type Res := New_Lit (New_Sizeof (Type_Info.B.Base_Type (Kind), Ghdl_Index_Type)); - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; El_Type := Get_Type (El); El_Type_Info := Get_Info (El_Type); if El_Type_Info.Type_Mode in Type_Mode_Unbounded then diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb index d4808ed2f..61479932a 100644 --- a/src/vhdl/translate/trans-chap4.adb +++ b/src/vhdl/translate/trans-chap4.adb @@ -449,16 +449,15 @@ package body Trans.Chap4 is Init_Array_Object (Obj, Obj_Type); when Type_Mode_Records => declare - List : constant Iir_List := + List : constant Iir_Flist := Get_Elements_Declaration_List (Obj_Type); Sobj : Mnode; El : Iir_Element_Declaration; begin Open_Temp; Sobj := Stabilize (Obj); - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; Init_Object (Chap6.Translate_Selected_Element (Sobj, El), Get_Type (El)); end loop; @@ -696,7 +695,7 @@ package body Trans.Chap4 is end; when Type_Mode_Records => declare - List : constant Iir_List := + List : constant Iir_Flist := Get_Elements_Declaration_List (Get_Base_Type (Sig_Type)); El : Iir; Res : O_Enode; @@ -706,9 +705,8 @@ package body Trans.Chap4 is begin Ssig := Stabilize (Sig); Res := O_Enode_Null; - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; Sig_El := Chap6.Translate_Selected_Element (Ssig, El); E := Get_Nbr_Signals (Sig_El, Get_Type (El)); if Res /= O_Enode_Null then @@ -758,11 +756,10 @@ package body Trans.Chap4 is Res_Type := Get_Element_Subtype (Res_Type); when Type_Mode_Records => declare - Element : Iir; + El_List : constant Iir_Flist := + Get_Elements_Declaration_List (Get_Base_Type (Res_Type)); + Element : constant Iir := Get_Nth_Element (El_List, 0); begin - Element := Get_First_Element - (Get_Elements_Declaration_List - (Get_Base_Type (Res_Type))); Res := Chap6.Translate_Selected_Element (Res, Element); Res_Type := Get_Type (Element); end; diff --git a/src/vhdl/translate/trans-chap7.adb b/src/vhdl/translate/trans-chap7.adb index bfa70ca3b..72eaa7714 100644 --- a/src/vhdl/translate/trans-chap7.adb +++ b/src/vhdl/translate/trans-chap7.adb @@ -815,16 +815,15 @@ package body Trans.Chap7 is when Iir_Kind_Record_Type_Definition | Iir_Kind_Record_Subtype_Definition => declare - Expr_Els : constant Iir_List := + Expr_Els : constant Iir_Flist := Get_Elements_Declaration_List (Expr_Type); - Atype_Els : constant Iir_List := + Atype_Els : constant Iir_Flist := Get_Elements_Declaration_List (Atype); Expr_El, Atype_El : Iir; Expr_El_Type, Atype_El_Type : Iir; begin - for I in Natural loop + for I in Flist_First .. Flist_Last (Expr_Els) loop Expr_El := Get_Nth_Element (Expr_Els, I); - exit when Expr_El = Null_Iir; Atype_El := Get_Nth_Element (Atype_Els, I); Expr_El_Type := Get_Type (Expr_El); Atype_El_Type := Get_Type (Atype_El); @@ -3139,7 +3138,7 @@ package body Trans.Chap7 is Aggr_Type : constant Iir := Get_Type (Aggr); Aggr_Base_Type : constant Iir_Record_Type_Definition := Get_Base_Type (Aggr_Type); - El_List : constant Iir_List := + El_List : constant Iir_Flist := Get_Elements_Declaration_List (Aggr_Base_Type); El_Index : Natural; Nbr_El : constant Natural := Get_Nbr_Elements (El_List); @@ -4808,7 +4807,7 @@ package body Trans.Chap7 is If_Blk : O_If_Block; Le, Re : Mnode; - El_List : Iir_List; + El_List : Iir_Flist; El : Iir_Element_Declaration; begin if Global_Storage = O_Storage_External then @@ -4823,9 +4822,8 @@ package body Trans.Chap7 is -- Compare each element. El_List := Get_Elements_Declaration_List (Rec_Type); - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; Open_Temp; Le := Chap6.Translate_Selected_Element (L, El); Re := Chap6.Translate_Selected_Element (R, El); @@ -5518,17 +5516,15 @@ package body Trans.Chap7 is New_Procedure_Call (Assocs); when Type_Mode_Record => declare - El_List : Iir_List; + El_List : constant Iir_Flist := + Get_Elements_Declaration_List (Get_Base_Type (Val_Type)); El : Iir; Val1 : Mnode; begin Open_Temp; Val1 := Stabilize (Val); - El_List := Get_Elements_Declaration_List - (Get_Base_Type (Val_Type)); - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; Translate_Rw (Chap6.Translate_Selected_Element (Val1, El), Get_Type (El), Proc); diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb index a4416f068..493f2336e 100644 --- a/src/vhdl/translate/trans-chap8.adb +++ b/src/vhdl/translate/trans-chap8.adb @@ -907,12 +907,12 @@ package body Trans.Chap8 is procedure Translate_Variable_Rec_Aggr (Targ : Iir_Aggregate; Targ_Type : Iir; Val : Mnode) is + El_List : constant Iir_Flist := + Get_Elements_Declaration_List (Get_Base_Type (Targ_Type)); Aggr_El : Iir; - El_List : Iir_List; El_Index : Natural; Elem : Iir; begin - El_List := Get_Elements_Declaration_List (Get_Base_Type (Targ_Type)); El_Index := 0; Aggr_El := Get_Association_Choices_Chain (Targ); while Aggr_El /= Null_Iir loop @@ -3943,13 +3943,12 @@ package body Trans.Chap8 is procedure Translate_Signal_Target_Record_Aggr (Aggr : Mnode; Target : Iir; Target_Type : Iir) is + El_List : constant Iir_Flist := + Get_Elements_Declaration_List (Get_Base_Type (Target_Type)); Aggr_El : Iir; - El_List : Iir_List; El_Index : Natural; Element : Iir_Element_Declaration; begin - El_List := Get_Elements_Declaration_List - (Get_Base_Type (Target_Type)); El_Index := 0; Aggr_El := Get_Association_Choices_Chain (Target); while Aggr_El /= Null_Iir loop diff --git a/src/vhdl/translate/trans-foreach_non_composite.adb b/src/vhdl/translate/trans-foreach_non_composite.adb index 53ac3a51b..c2dc58b7e 100644 --- a/src/vhdl/translate/trans-foreach_non_composite.adb +++ b/src/vhdl/translate/trans-foreach_non_composite.adb @@ -79,7 +79,7 @@ begin when Type_Mode_Record | Type_Mode_Unbounded_Record => declare - List : constant Iir_List := + List : constant Iir_Flist := Get_Elements_Declaration_List (Targ_Type); Var_Record : Mnode; Sub_Data : Data_Type; @@ -90,9 +90,8 @@ begin Var_Record := Stabilize (Targ); Composite_Data := Prepare_Data_Record (Var_Record, Targ_Type, Data); - for I in Natural loop + for I in Flist_First .. Flist_Last (List) loop El := Get_Nth_Element (List, I); - exit when El = Null_Iir; Sub_Data := Update_Data_Record (Composite_Data, Targ_Type, El); Foreach_Non_Composite (Chap6.Translate_Selected_Element (Var_Record, El), diff --git a/src/vhdl/translate/trans-rtis.adb b/src/vhdl/translate/trans-rtis.adb index a555920e7..a60138fea 100644 --- a/src/vhdl/translate/trans-rtis.adb +++ b/src/vhdl/translate/trans-rtis.adb @@ -1619,7 +1619,7 @@ package body Trans.Rtis is procedure Generate_Record_Type_Definition (Atype : Iir) is Info : constant Type_Info_Acc := Get_Info (Atype); - El_List : Iir_List; + El_List : Iir_Flist; El : Iir; Prev : Rti_Block; El_Arr : O_Dnode; @@ -1636,9 +1636,8 @@ package body Trans.Rtis is -- Generate elements. Push_Rti_Node (Prev, False); - for I in Natural loop + for I in Flist_First .. Flist_Last (El_List) loop El := Get_Nth_Element (El_List, I); - exit when El = Null_Iir; declare El_Type : constant Iir := Get_Type (El); Field_Info : constant Field_Info_Acc := Get_Info (El); |