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authorTristan Gingold <tgingold@free.fr>2018-12-12 18:24:32 +0100
committerTristan Gingold <tgingold@free.fr>2018-12-13 18:50:55 +0100
commitb88d47ab749a684ef32cb7d55bdfcea4c229d7a0 (patch)
treebd4bc3fa3068ed9a1c8df9be01f885fcb3f727ba /src/vhdl/sem_lib.ads
parentccf8b3bf2854641388619e68325998b9ddd229de (diff)
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Rename overloaded Load_File and export it to python.
Diffstat (limited to 'src/vhdl/sem_lib.ads')
-rw-r--r--src/vhdl/sem_lib.ads2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vhdl/sem_lib.ads b/src/vhdl/sem_lib.ads
index 4d18356ae..7f57833b5 100644
--- a/src/vhdl/sem_lib.ads
+++ b/src/vhdl/sem_lib.ads
@@ -24,7 +24,7 @@ package Sem_Lib is
-- absolute path).
-- Emit an error if the file cannot be opened.
-- Return NULL_IIR in case of parse error.
- function Load_File (File_Name: Name_Id) return Iir_Design_File;
+ function Load_File_Name (File_Name: Name_Id) return Iir_Design_File;
function Load_File (File : Source_File_Entry) return Iir_Design_File;
-- Load, parse, analyze, back-end a design_unit if necessary.