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author | Tristan Gingold <tgingold@free.fr> | 2022-09-17 19:14:54 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-09-17 19:14:54 +0200 |
commit | 9756cfb38ea8ed8e9d1e92354ec8849b16bb00f1 (patch) | |
tree | 6745d259c00e6e5827bf00ab7a7165e90e30bd1e /src/synth | |
parent | 69ee33d1f0e4559b868068c955ef9c24f0438a11 (diff) | |
download | ghdl-9756cfb38ea8ed8e9d1e92354ec8849b16bb00f1.tar.gz ghdl-9756cfb38ea8ed8e9d1e92354ec8849b16bb00f1.tar.bz2 ghdl-9756cfb38ea8ed8e9d1e92354ec8849b16bb00f1.zip |
simul: use synth_declarations for processes and procedures
Diffstat (limited to 'src/synth')
-rw-r--r-- | src/synth/elab-vhdl_decls.adb | 13 | ||||
-rw-r--r-- | src/synth/synth-vhdl_decls.adb | 11 |
2 files changed, 11 insertions, 13 deletions
diff --git a/src/synth/elab-vhdl_decls.adb b/src/synth/elab-vhdl_decls.adb index 6b3eca650..eeffc90fd 100644 --- a/src/synth/elab-vhdl_decls.adb +++ b/src/synth/elab-vhdl_decls.adb @@ -16,8 +16,6 @@ -- You should have received a copy of the GNU General Public License -- along with this program. If not, see <gnu.org/licenses>. -with Areapools; - with Vhdl.Errors; use Vhdl.Errors; with Vhdl.Utils; use Vhdl.Utils; @@ -353,17 +351,6 @@ package body Elab.Vhdl_Decls is when Iir_Kinds_Signal_Attribute => -- Not supported by synthesis. null; - when Iir_Kind_Suspend_State_Declaration => - declare - Val : Valtyp; - begin - pragma Assert (Areapools.Is_Empty (Expr_Pool)); - - Current_Pool := Instance_Pool; - Val := Create_Value_Memtyp (Create_Memory_U32 (0)); - Current_Pool := Expr_Pool'Access; - Create_Object (Syn_Inst, Decl, Val); - end; when others => Vhdl.Errors.Error_Kind ("elab_declaration", Decl); end case; diff --git a/src/synth/synth-vhdl_decls.adb b/src/synth/synth-vhdl_decls.adb index 7930426f5..ca1414c84 100644 --- a/src/synth/synth-vhdl_decls.adb +++ b/src/synth/synth-vhdl_decls.adb @@ -703,6 +703,17 @@ package body Synth.Vhdl_Decls is when Iir_Kind_Attribute_Implicit_Declaration => -- Not supported by synthesis. null; + when Iir_Kind_Suspend_State_Declaration => + declare + Val : Valtyp; + begin + pragma Assert (Areapools.Is_Empty (Expr_Pool)); + + Current_Pool := Instance_Pool; + Val := Create_Value_Memtyp (Create_Memory_U32 (0)); + Current_Pool := Expr_Pool'Access; + Create_Object (Syn_Inst, Decl, Val); + end; when others => Vhdl.Errors.Error_Kind ("synth_declaration", Decl); end case; |