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authorTristan Gingold <tgingold@free.fr>2022-09-17 19:14:54 +0200
committerTristan Gingold <tgingold@free.fr>2022-09-17 19:14:54 +0200
commit9756cfb38ea8ed8e9d1e92354ec8849b16bb00f1 (patch)
tree6745d259c00e6e5827bf00ab7a7165e90e30bd1e
parent69ee33d1f0e4559b868068c955ef9c24f0438a11 (diff)
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simul: use synth_declarations for processes and procedures
-rw-r--r--src/simul/simul-vhdl_elab.adb5
-rw-r--r--src/simul/simul-vhdl_simul.adb4
-rw-r--r--src/synth/elab-vhdl_decls.adb13
-rw-r--r--src/synth/synth-vhdl_decls.adb11
4 files changed, 15 insertions, 18 deletions
diff --git a/src/simul/simul-vhdl_elab.adb b/src/simul/simul-vhdl_elab.adb
index 68135502c..b131d5462 100644
--- a/src/simul/simul-vhdl_elab.adb
+++ b/src/simul/simul-vhdl_elab.adb
@@ -26,8 +26,6 @@ with Synth.Vhdl_Stmts;
with Synth.Vhdl_Decls;
with Trans_Analyzes;
-with Elab.Vhdl_Decls;
-
with Simul.Vhdl_Debug;
package body Simul.Vhdl_Elab is
@@ -946,7 +944,8 @@ package body Simul.Vhdl_Elab is
Proc_Inst := Make_Elab_Instance (Processes_Table.Table (I).Inst,
Proc, Null_Node);
Processes_Table.Table (I).Inst := Proc_Inst;
- Elab.Vhdl_Decls.Elab_Declarations
+ Set_Instance_Const (Proc_Inst, True);
+ Synth.Vhdl_Decls.Synth_Declarations
(Proc_Inst, Get_Declaration_Chain (Proc), True);
exit when Is_Error (Proc_Inst);
end if;
diff --git a/src/simul/simul-vhdl_simul.adb b/src/simul/simul-vhdl_simul.adb
index 28c13d941..2f3c2ef87 100644
--- a/src/simul/simul-vhdl_simul.adb
+++ b/src/simul/simul-vhdl_simul.adb
@@ -40,7 +40,6 @@ with Elab.Debugger;
with Elab.Vhdl_Objtypes; use Elab.Vhdl_Objtypes;
with Elab.Vhdl_Values; use Elab.Vhdl_Values;
with Elab.Vhdl_Types;
-with Elab.Vhdl_Decls;
with Elab.Vhdl_Debug;
with Trans_Analyzes;
@@ -49,6 +48,7 @@ with Synth.Errors;
with Synth.Vhdl_Stmts; use Synth.Vhdl_Stmts;
with Synth.Vhdl_Expr;
with Synth.Vhdl_Oper;
+with Synth.Vhdl_Decls;
with Synth.Vhdl_Static_Proc;
with Synth.Flags;
with Synth.Ieee.Std_Logic_1164; use Synth.Ieee.Std_Logic_1164;
@@ -795,7 +795,7 @@ package body Simul.Vhdl_Simul is
(Sub_Inst, Inst, Inter_Chain, Assoc_Chain);
Process.Instance := Sub_Inst;
- Elab.Vhdl_Decls.Elab_Declarations
+ Synth.Vhdl_Decls.Synth_Declarations
(Sub_Inst, Get_Declaration_Chain (Bod), True);
if Get_Suspend_Flag (Bod) then
diff --git a/src/synth/elab-vhdl_decls.adb b/src/synth/elab-vhdl_decls.adb
index 6b3eca650..eeffc90fd 100644
--- a/src/synth/elab-vhdl_decls.adb
+++ b/src/synth/elab-vhdl_decls.adb
@@ -16,8 +16,6 @@
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <gnu.org/licenses>.
-with Areapools;
-
with Vhdl.Errors; use Vhdl.Errors;
with Vhdl.Utils; use Vhdl.Utils;
@@ -353,17 +351,6 @@ package body Elab.Vhdl_Decls is
when Iir_Kinds_Signal_Attribute =>
-- Not supported by synthesis.
null;
- when Iir_Kind_Suspend_State_Declaration =>
- declare
- Val : Valtyp;
- begin
- pragma Assert (Areapools.Is_Empty (Expr_Pool));
-
- Current_Pool := Instance_Pool;
- Val := Create_Value_Memtyp (Create_Memory_U32 (0));
- Current_Pool := Expr_Pool'Access;
- Create_Object (Syn_Inst, Decl, Val);
- end;
when others =>
Vhdl.Errors.Error_Kind ("elab_declaration", Decl);
end case;
diff --git a/src/synth/synth-vhdl_decls.adb b/src/synth/synth-vhdl_decls.adb
index 7930426f5..ca1414c84 100644
--- a/src/synth/synth-vhdl_decls.adb
+++ b/src/synth/synth-vhdl_decls.adb
@@ -703,6 +703,17 @@ package body Synth.Vhdl_Decls is
when Iir_Kind_Attribute_Implicit_Declaration =>
-- Not supported by synthesis.
null;
+ when Iir_Kind_Suspend_State_Declaration =>
+ declare
+ Val : Valtyp;
+ begin
+ pragma Assert (Areapools.Is_Empty (Expr_Pool));
+
+ Current_Pool := Instance_Pool;
+ Val := Create_Value_Memtyp (Create_Memory_U32 (0));
+ Current_Pool := Expr_Pool'Access;
+ Create_Object (Syn_Inst, Decl, Val);
+ end;
when others =>
Vhdl.Errors.Error_Kind ("synth_declaration", Decl);
end case;