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author | Tristan Gingold <tgingold@free.fr> | 2019-05-05 20:57:21 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-05-05 20:57:21 +0200 |
commit | 6535ea096a13d8f03547f7d5e5018c0dea46252d (patch) | |
tree | 845f866bd86148474c48802d2a185019e7a60fb0 /src/synth/synth-types.ads | |
parent | 7892c6e7945d5e4b46ddde4f18debe1c06bd3e12 (diff) | |
download | ghdl-6535ea096a13d8f03547f7d5e5018c0dea46252d.tar.gz ghdl-6535ea096a13d8f03547f7d5e5018c0dea46252d.tar.bz2 ghdl-6535ea096a13d8f03547f7d5e5018c0dea46252d.zip |
vhdl: rename iirs to vhdl.nodes
Diffstat (limited to 'src/synth/synth-types.ads')
-rw-r--r-- | src/synth/synth-types.ads | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-types.ads b/src/synth/synth-types.ads index 934edbb53..b07e22e9e 100644 --- a/src/synth/synth-types.ads +++ b/src/synth/synth-types.ads @@ -20,7 +20,7 @@ with Netlists; use Netlists; with Synth.Values; use Synth.Values; -with Iirs; use Iirs; +with Vhdl.Nodes; use Vhdl.Nodes; package Synth.Types is -- All known enumeration type that are translated to a single bit. |