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| author | Tristan Gingold <tgingold@free.fr> | 2020-05-31 09:19:07 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-05-31 09:19:07 +0200 |
| commit | 7298513634bf4a649a2737afd87e02aced87aee6 (patch) | |
| tree | 8ecfa1e1c0cc072816358dd6cf4b718ebf4c35d6 /src/synth/netlists-inference.adb | |
| parent | 96a7649fe86575ca8c16aa2b46ae8d55f638b4a6 (diff) | |
| download | ghdl-7298513634bf4a649a2737afd87e02aced87aee6.tar.gz ghdl-7298513634bf4a649a2737afd87e02aced87aee6.tar.bz2 ghdl-7298513634bf4a649a2737afd87e02aced87aee6.zip | |
synth: improve support of true dual port rams. For #1069
Diffstat (limited to 'src/synth/netlists-inference.adb')
| -rw-r--r-- | src/synth/netlists-inference.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/netlists-inference.adb b/src/synth/netlists-inference.adb index 91e095211..d2a749968 100644 --- a/src/synth/netlists-inference.adb +++ b/src/synth/netlists-inference.adb @@ -340,7 +340,7 @@ package body Netlists.Inference is and then Can_Infere_RAM (Data, Prev_Val) then -- Maybe it is a RAM. - Res := Infere_RAM (Ctxt, Data, Clk, Clk_Enable); + Res := Infere_RAM (Ctxt, Data, Els, Clk, Clk_Enable); else if Clk_Enable /= No_Net then -- If there is a condition with the clock, that's an enable which |