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authorTristan Gingold <tgingold@free.fr>2019-11-10 07:24:27 +0100
committerTristan Gingold <tgingold@free.fr>2019-11-11 20:28:41 +0100
commit6eb11dd7c637659881f80cd66e5504b2b057d370 (patch)
tree76baa3f4e11e3f29da3b41c52d4a87ab6a0ad934 /src/synth/netlists-disp_vhdl.adb
parent72094d312400368dda79e32b4403d0f142404fad (diff)
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netlists: expand dyn_insert_en
Diffstat (limited to 'src/synth/netlists-disp_vhdl.adb')
-rw-r--r--src/synth/netlists-disp_vhdl.adb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb
index e49165691..f673a69de 100644
--- a/src/synth/netlists-disp_vhdl.adb
+++ b/src/synth/netlists-disp_vhdl.adb
@@ -827,6 +827,7 @@ package body Netlists.Disp_Vhdl is
" \o0 <= \i0;" & NL,
Inst);
if Id = Id_Dyn_Insert_En then
+ -- TODO: fix indentation.
Disp_Template (" if \i3 = '1' then" & NL, Inst);
end if;
Disp_Template