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authorTristan Gingold <tgingold@free.fr>2022-05-22 09:09:14 +0200
committerTristan Gingold <tgingold@free.fr>2022-05-22 09:09:14 +0200
commit946320e0984df406f0e3c50cd3db0fb49df5ec9b (patch)
tree97d51eff8e649cacf5ad081f7dd9258553ddb2b2 /src/synth/elab-vhdl_objtypes.ads
parentc56080fed0b46083cf138962c5bb125ea08bfa0e (diff)
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synth: merge value for type_vector and type_array
Diffstat (limited to 'src/synth/elab-vhdl_objtypes.ads')
-rw-r--r--src/synth/elab-vhdl_objtypes.ads12
1 files changed, 5 insertions, 7 deletions
diff --git a/src/synth/elab-vhdl_objtypes.ads b/src/synth/elab-vhdl_objtypes.ads
index d7f246d8e..c9f1a4894 100644
--- a/src/synth/elab-vhdl_objtypes.ads
+++ b/src/synth/elab-vhdl_objtypes.ads
@@ -140,18 +140,16 @@ package Elab.Vhdl_Objtypes is
Drange : Discrete_Range_Type;
when Type_Float =>
Frange : Float_Range_Type;
- when Type_Vector =>
- Vbound : Bound_Type;
- Vec_El : Type_Acc;
- when Type_Unbounded_Vector =>
- Uvec_El : Type_Acc;
- Uvec_Idx1 : Type_Acc;
when Type_Slice =>
Slice_El : Type_Acc;
- when Type_Array =>
+ when Type_Array
+ | Type_Vector =>
Abound : Bound_Type;
Alast : Boolean; -- True for the last dimension
Arr_El : Type_Acc;
+ when Type_Unbounded_Vector =>
+ Uvec_El : Type_Acc;
+ Uvec_Idx1 : Type_Acc;
when Type_Unbounded_Array =>
Uarr_Ndim : Dim_Type;
Uarr_El : Type_Acc;