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| author | Tristan Gingold <tgingold@free.fr> | 2022-05-19 06:43:47 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-05-19 06:43:47 +0200 |
| commit | f8f24837237c8705c21b4b46c9f8474b50786f95 (patch) | |
| tree | bd53681ee6d8e0b220773e2811734e74fab63c6e /src/synth/elab-vhdl_debug.adb | |
| parent | ca53fab7cf13635747450b16525f5545c4b8bfe1 (diff) | |
| download | ghdl-f8f24837237c8705c21b4b46c9f8474b50786f95.tar.gz ghdl-f8f24837237c8705c21b4b46c9f8474b50786f95.tar.bz2 ghdl-f8f24837237c8705c21b4b46c9f8474b50786f95.zip | |
synth/elab-vhdl_values: use a proper type for signal_index
Diffstat (limited to 'src/synth/elab-vhdl_debug.adb')
| -rw-r--r-- | src/synth/elab-vhdl_debug.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/elab-vhdl_debug.adb b/src/synth/elab-vhdl_debug.adb index 79153d4cd..f7820edf5 100644 --- a/src/synth/elab-vhdl_debug.adb +++ b/src/synth/elab-vhdl_debug.adb @@ -190,7 +190,7 @@ package body Elab.Vhdl_Debug is when Value_Signal => Put ("signal"); Put (' '); - Put_Uns32 (Vt.Val.S); + Put_Uns32 (Uns32 (Vt.Val.S)); when Value_File => Put ("file"); when Value_Const => |