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| author | Tristan Gingold <tgingold@free.fr> | 2019-09-07 17:41:00 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-09-11 06:37:26 +0200 |
| commit | 2b3a1bb316317453d4e40bc3a650b4ed07eee7a8 (patch) | |
| tree | 2d4446502e2ab262c6a3fcf03b2d912bfad2944d /src/std_names.ads | |
| parent | 89969411e5d6ecb5efd89172a9462a92878f093b (diff) | |
| download | ghdl-2b3a1bb316317453d4e40bc3a650b4ed07eee7a8.tar.gz ghdl-2b3a1bb316317453d4e40bc3a650b4ed07eee7a8.tar.bz2 ghdl-2b3a1bb316317453d4e40bc3a650b4ed07eee7a8.zip | |
vhdl: recognize numeric_std shift_left.
Diffstat (limited to 'src/std_names.ads')
| -rw-r--r-- | src/std_names.ads | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/std_names.ads b/src/std_names.ads index e20db31a9..3af9e6082 100644 --- a/src/std_names.ads +++ b/src/std_names.ads @@ -723,9 +723,11 @@ package Std_Names is Name_To_Signed : constant Name_Id := Name_First_Ieee + 021; Name_Resize : constant Name_Id := Name_First_Ieee + 022; Name_Std_Match : constant Name_Id := Name_First_Ieee + 023; - Name_Math_Real : constant Name_Id := Name_First_Ieee + 024; - Name_Ceil : constant Name_Id := Name_First_Ieee + 025; - Name_Log2 : constant Name_Id := Name_First_Ieee + 026; + Name_Shift_Left : constant Name_Id := Name_First_Ieee + 024; + Name_Shift_Right : constant Name_Id := Name_First_Ieee + 025; + Name_Math_Real : constant Name_Id := Name_First_Ieee + 026; + Name_Ceil : constant Name_Id := Name_First_Ieee + 027; + Name_Log2 : constant Name_Id := Name_First_Ieee + 028; Name_Last_Ieee : constant Name_Id := Name_Log2; -- Verilog Directives. |